ADDRESS SPACE
3.5 EIT Vector Entry
3
3.5 EIT Vector Entry
The EIT vector entry is located at the beginning of the internal ROM/extended external areas. The branch instruc-
tion for jumping to the start address of each EIT event processing handler is written here. Note that it is the branch
instruction and not the jump address itself that is written here. For details, see Chapter 4, “EIT.”
0
31
H'0000 0000
H'0000 0004
H'0000 0008
H'0000 000C
H'0000 0010
H'0000 0014
H'0000 0018
H'0000 001C
H'0000 0020
H'0000 0024
H'0000 0028
H'0000 002C
H'0000 0030
H'0000 0034
H'0000 0038
H'0000 003C
H'0000 0040
H'0000 0044
H'0000 0048
H'0000 004C
H'0000 0050
H'0000 0054
H'0000 0058
H'0000 005C
H'0000 0060
H'0000 0064
H'0000 0068
H'0000 006C
H'0000 0070
H'0000 0074
H'0000 0078
H'0000 007C
H'0000 0080
H'0000 0090
RI (Reset Interrupt)
SBI (System Break Interrupt)
RIE (Reserved Instruction Exception)
AE (Address Exception)
TRAP0
TRAP1
TRAP2
TRAP3
TRAP4
TRAP5
TRAP6
TRAP7
TRAP8
TRAP9
TRAP10
TRAP11
TRAP12
TRAP13
TRAP14
TRAP15
EI (External Interrupt) (Note 1)
FPE (Floating-Point Exception)
Note 1: When flash entry bit = 1 (flash E/W enable mode), the EI vector entry is located at H'0080 4000.
Figure 3.5.1 EIT Vector Entry
32180 Group User’s Manual (Rev.1.0)
3-35
RENESAS [ RENESAS TECHNOLOGY CORP ]
