ADDRESS SPACE
3.4 Internal RAM and SFR Areas
3
SFR Area Register Map (13/27)
Address
b0
+0 address
+1 address
See pages
b7 b8
b15
H'0080 07C4
H'0080 07C6
H'0080 07C8
H'0080 07CA
H'0080 07CC
H'0080 07CE
TOU0_6 Reload Register
(TOU06RLW)
TOU0_6 Reload 1 Register
(TOU06RL1)
TOU0_6 Reload 0 Register
(TOU06RL0)
10-164
10-167
10-166
10-161
10-163
TOU0_7 Counter
(TOU07CTW)
(Upper)
(TOU07CTH)
(Lower)
(TOU07CT)
TOU0_7 Reload Register
(TOU07RLW)
TOU0_7 Reload 1 Register
(TOU07RL1)
TOU0_7 Reload 0 Register
(TOU07RL0)
10-164
10-167
10-166
H'0080 07D0
H'0080 07D2
H'0080 07D4
H'0080 07D6
H'0080 07D8
H'0080 07DA
H'0080 07DC
H'0080 07DE
H'0080 07E0
H'0080 07E2
|
Prescaler Register 3
(PRS3)
TOU0 Interrupt Request Mask Register
(TOU0IMA)
TID0 Control & Prescaler 3 Enable Register
(TID0PRS3EN)
TOU0 Interrupt Request Status Register
(TOU0IST)
10-12
10-141
10-58
(Use inhibited area)
F/F21–28 Protect Register
(FF2128P)
F/F21–28 Data Register
(FF2128D)
10-31
(Use inhibited area)
10-33
TOU0 Control Register 1
10-158
10-158
10-168
10-169
(TOU0CR1)
TOU0 Control Register 0
(TOU0CR0)
(Use inhibited area)
(Use inhibited area)
TOU0 Enable Protect Register
(TOU0PRO)
TOU0 Count Enable Register
(TOU0CEN)
PWMOFF0 Input Processing Control Register
(PWMOFF0CR)
TIN24, 25 Interrupt Request Mask Register
(TIN2425IMA)
TIN24, 25 Input Processing Control Register
(TIN2425CR)
TIN24, 25 Interrupt Request Status Register
(TIN2425IST)
10-171
10-25
10-53
(Use inhibited area)
H'0080 0A00
H'0080 0A02
|
SIO45 Interrupt Request Status Register
(SI45STAT)
SIO45 Interrupt Source Select Register
(SI45SEL)
SIO45 Interrupt Request Enable Register
(SI45EN)
12-9
12-10
(Use inhibited area)
12-11
(Use inhibited area)
H'0080 0A10
H'0080 0A12
H'0080 0A14
H'0080 0A16
|
SIO4 Transmit Control Register
(S4TCNT)
SIO4 Transmit/Receive Mode Register
(S4MOD)
12-14
12-15
12-18
SIO4 Transmit Buffer Register
(S4TXB)
SIO4 Receive Buffer Register
(S4RXB)
12-19
SIO4 Receive Control Register
SIO4 Baud Rate Register
(S4BAUR)
12-20
12-23
(S4RCNT)
(Use inhibited area)
H'0080 0A20
H'0080 0A22
H'0080 0A24
H'0080 0A26
|
SIO5 Transmit Control Register
(S5TCNT)
SIO5 Transmit/Receive Mode Register
(S5MOD)
12-14
12-15
12-18
SIO5 Transmit Buffer Register
(S5TXB)
SIO5 Receive Buffer Register
(S5RXB)
12-19
SIO5 Receive Control Register
SIO5 Baud Rate Register
(S5BAUR)
12-20
12-23
(S5RCNT)
(Use inhibited area)
(Use inhibited area)
H'0080 0A80
H'0080 0A82
H'0080 0A84
A-D1 Single Mode Register 0
(AD1SIM0)
A-D1 Single Mode Register 1
(AD1SIM1)
11-16
11-18
A-D1 Scan Mode Register 0
(AD1SCM0)
A-D1 Scan Mode Register 1
(AD1SCM1)
11-20
11-22
H'0080 0A86 A-D1 Disconnection Detection Assist Function Control Register
(AD1DDACR)
A-D1 Conversion Speed Control Register
(AD1CVSCR)
11-25
11-24
H'0080 0A88
A-D1 Successive Approximation Register
11-29
(AD1SAR)
32180 Group User’s Manual (Rev.1.0)
3-20
RENESAS [ RENESAS TECHNOLOGY CORP ]
