MULTIJUNCTION TIMERS
10.3 TOP (Output-Related 16-Bit Timer)
10
TOP6,7 Control Register (TOP67CR)
<Address: H’0080 02AA>
b0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
b15
TOP7
ENS
0
TOP7M
TOP67ENS
0
TOP67CKS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
<After reset: H’0000>
b
0
1
Bit Name
Function
R
0
W
0
No function assigned. Fix to "0".
TOP7ENS
0: Result selected by TOP67ENS bit
1: TOP6 output
R
W
TOP7 enable source select bit
2, 3
TOP7M
00: Single-shot output mode
01: Delayed single-shot output mode
10: Continuous output mode
11: – ditto –
R
W
TOP7 operation mode select bit
4, 5
6, 7
No function assigned. Fix to "0".
0
0
TOP6M
00: Single-shot output mode
01: Delayed single-shot output mode
10: Continuous output mode
11: – ditto –
R
W
TOP6 operation mode select bit
8
No function assigned. Fix to "0".
TOP67ENS
0
0
9–11
000: External TIN1 input
001: – ditto –
R
W
TOP6, TOP7 enable source select bit
010: – ditto –
011: – ditto –
100: Input event bus 0
101: Input event bus 1
110: Input event bus 2
111: Input event bus 3
12, 13
14, 15
No function assigned. Fix to "0".
0
0
TOP67CKS
00: Clock bus 0
01: Clock bus 1
10: Clock bus 2
11: Clock bus 3
R
W
TOP6, TOP7 clock source select bit
Notes: • This register must always be accessed in halfwords.
• Operation mode can only be set or changed while the counter is inactive.
Clock bus
Input event bus
3 2 1 0 3 2 1 0
clk
clk
S
udf
udf
TOP 6
TOP 7
en
en
TIN1 (P151)
TIN1S
S
S
: Selector
S
Note: • This diagram only illustrates TOP control registers and is partly omitted.
Figure 10.3.4 Outline Diagram of TOP6, TOP7 Clock and Enable Inputs
32180 Group User’s Manual (Rev.1.0)
10-73