OVERVIEW
1.3 Pin Functions
1
Table 1.3.1 Description of Pin Functions (2/5)
Type
Pin Name
Signal Name
Input/Output Description
Data bus
DB0–DB15 Data bus
Input/output This 16-bit data bus is used to connect external devices.
When writing in byte units during a write cycle, the output
data at the invalid byte position is undefined. During a
read cycle, data on the entire 16-bit bus is always read in.
However, only the data at the valid byte position is
transferred into the internal circuit.
Bus control
CS0#–CS3# Chip select
Output
Output
Output
These are chip select signals for external devices.
This signal is output when reading an external device.
This signal is output when writing to an external device.
RD#
Read
Write
WR#
BHW#/BLW# Byte high/low write Output
When writing to an external device, this signal indicates the
valid byte position to which data is transferred. BHW# and
BLW# correspond to the upper address side (bits 0–7 are
valid) and the lower address side (bits 8–15 are valid),
respectively.
BHE#
Byte high enable
Byte low enable
Wait
Output
Output
Input
During an external device access, this signal indicates that
the high-order data (bits 0–7) is valid.
BLE#
During an external device access, this signal indicates that
the low-order data (bits 8–15) is valid.
WAIT#
HREQ#
When accessing an external device, a low-level input on
WAIT# pin extends the wait cycle.
Hold request
Input
This input is used by an external device to request control
of the external bus. A low-level input on HREQ# pin places
the CPU in a hold state.
HACK#
Hold acknowledge Output
This signal notifies that the CPU has entered a hold state
and relinquished control of the external bus.
Multijunction
timer
TIN0–TIN33 Timer input
TO0–TO44 Timer output
Input
Input pins for the multijunction timer.
Output pins for the multijunction timer.
Clock input pins for the multijunction timer.
Output
Input
TCLK0
Timer clock
–TCLK3
32180 Group User’s Manual (Rev.1.0)
1-10
RENESAS [ RENESAS TECHNOLOGY CORP ]
