INPUT/OUTPUT PORTS AND PIN FUNCTIONS
8.5 Port Peripheral Circuits
8
P160–P165(TO21–TO26)
P180–P185(TO29–TO34)
P210–P215(TO37–TO42)
PWM output disable
Direction register
Port output latch
Data bus
Input data select bit
Operation mode register
(Note 1)
Port level switching
function (No
Peripheral function output
peripheral input)
Input function
enable
P41(BLW#/BLE#)
P42(BHW#/BHE#)
P43(RD#)
Direction register
P61–P63
P67
Data bus
Port output latch
Input data select bit
(Note 1)
Port level switching
function (No
peripheral input)
Input function
enable
Direction register
Port output latch
Data bus
Input data select bit
P65(SCLKI4/SCLKO4)
P66(SCLKI5/SCLKO5)
P84(SCLKI0/SCLKO0)
P87(SCLKI1/SCLKO1)
Operation mode register
UART/CSIO function
select bit
Internal/external clock
select bit
(Note 1)
Port level switching
function (Standard:
peripheral Schmitt)
output
SCLKOi
SCLKIi input
Input function
enable
Note 1: For details about the port level switching function, see Section 8.4, "Port Input Level Switching Function."
Notes: • During processor and external extension modes, P41-P43 are external bus interface control signal pins, but their
functional description in this block diagram is omitted.
• The circle denotes a pin.
• The symbol
denotes a parasitic diode. Make sure the voltage applied to each pin does not exceed the VCCE voltage.
• The input capacitance of each pin is approximately 10 pF.
Figure 8.5.3 Port Peripheral Circuit Diagram (3)
32180 Group User’s Manual (Rev.1.0)
8-29
RENESAS [ RENESAS TECHNOLOGY CORP ]
