INTERNAL MEMORY
6.4 Registers Associated with the Internal Flash Memory
6
Flash Control Register 3 (FCNT3)
<Address: H’0080 01E4>
b0
1
2
3
4
5
6
b7
FELEVEL
0
0
0
0
0
0
0
0
<After reset: H’00>
b
Bit Name
Function
R
0
W
0
0–6
7
No function assigned. Fix to "0".
FELEVEL
0: Normal level
R
W
Erase margin-up bit
1: Raise erase margin up
Flash Control Register 3 (FCNT3) controls the depth of erase levels when erasing the internal flash memory with one
of erase commands. The internal flash memory erase level can be deepened by setting the FELEVEL bit to "1".
Flash Control Register 4 (FCNT4)
<Address: H’0080 01E5>
b8
9
10
11
12
13
14
b15
FRESET
0
0
0
0
0
0
0
0
<After reset: H’00>
b
Bit Name
Function
R
0
W
0
8–14
15
No function assigned. Fix to "0".
FRESET
0: No operation
1: Reset
R
W
Flash reset bit
Flash Control Register 4 (FCNT4) controls initializing each status bit of Flash Status Register 2 (FSTAT2) or
canceling a programming/erase operation.
Setting the FRESET bit to "1" initializes each status bit of the FSTAT2 register or cancels a programming/erase
operation.
The FRESET bit is effective only when the FENTRY bit = "1". If the FENTRY bit = "0", the FRESET bit informa-
tion is ignored.
When programming or easing the internal flash memory, make sure the FRESET bit remains "0".
An example for clearing each status of FSTAT2 during a programming/erase operation, and an example for
forcibly terminating (canceling) a programming/erase operation due to time-out are shown below.
32180 Group User’s Manual (Rev.1.0)
6-9
RENESAS [ RENESAS TECHNOLOGY CORP ]
