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M30840SGP 参数 Datasheet PDF下载

M30840SGP图片预览
型号: M30840SGP
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片16位/ 32位微机的CMOS [SINGLE-CHIP 16/32-BIT CMOS MICROCOMPUTER]
分类和应用: 微控制器和处理器外围集成电路计算机时钟
文件页数/大小: 89 页 / 760 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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1. Overview  
M32C/84 Group (M32C/84, M32C/84T)  
1.6 Pin Description  
Table 1.6 Pin Description (100-Pin and 144-Pin Packages)  
Supply  
Voltage  
Classsfication  
Symbol  
I/O Type  
Function  
Power Supply VCC1, VCC2  
VSS  
I
-
Apply 3.0 to 5.5V to both VCC1 and VCC2 pins. Apply 0V to the  
(1, 2)  
VSS pin. VCC1 VCC2  
Analog Power AVCC  
I
VCC1  
Supplies power to the A/D converter. Connect the AVCC pin to  
Supply  
AVSS  
VCC1 and the AVSS pin to VSS  
____________  
___________  
Reset Input  
CNVSS  
RESET  
CNVSS  
I
I
VCC1  
VCC1  
The microcomputer is in a reset state when "L" is applied to the RESET pin  
Switches processor mode. Connect the CNVSS pin to VSS to start up  
in single-chip mode or to VCC1 to start up in microprocessor mode  
Input to Switch BYTE  
External Data Bus  
Width(3)  
I
VCC1 Switches data bus width in external memory space 3. The data  
bus is 16 bits wide when the BYTE pin is held "L" and 8 bits wide  
when it is held "H". Set to either. Connect the BYTE pin to VSS  
to use the microcomputer in single-chip mode  
Bus Control  
Pins(3)  
D0 to D7  
I/O  
I/O  
VCC2  
Inputs and outputs data (D0 to D7) while accessing an external  
memory space with separate bus  
D8 to D15  
VCC2  
Inputs and outputs data (D8 to D15) while accessing an external  
memory space with 16-bit separate bus  
A0 to A22  
O
O
VCC2  
VCC2  
VCC2  
Outputs address bits A0 to A22  
______  
A23  
Outputs inversed address bit A23  
A0/D0 to  
A7/D7  
I/O  
Inputs and outputs data (D0 to D7) and outputs 8 low-order  
address bits (A0 to A7) by time-sharing while accessing an  
external memory space with multiplexed bus  
A8/D8 to  
A15/D15  
I/O  
VCC2  
Inputs and outputs data (D8 to D15) and outputs 8 middle-order  
address bits (A8 to A15) by time-sharing while accessing an  
external memory space with 16-bit multiplexed bus  
______  
______  
_______  
_______  
CS0 to CS3  
O
O
VCC2  
VCC2  
Outputs CS0 to CS3 that are chip-select signals specifying an external space  
________ ______ _____ ________  
______  
________  
WRL  
Outputs WRL, _W___R___H__, (WR, _B__H___E__) and RD signals. WRL and  
/ WR  
_________  
_________  
______ _______  
WRH / _B__H___E__  
WRH can be switched with WR and BHE by program  
________ _____  
_____  
RD  
WRL, _W___R___H__ and RD selected:  
If external data bus is 16 bits wide, data is written to an even  
________  
address in external memory space when WRL is held "L".  
Data is written to an odd address when _W___R___H__ is held "L".  
_____  
Data is read when RD is held "L".  
______  
_____  
WR, _B__H___E__ and RD selected:  
______  
Data is written to external memory space when WR is held "L".  
_____  
Data in an external memory space is read when RD is held "L".  
An odd address is accessed when _B__H___E__ is held "L".  
_____  
Select _W___R__, _B__H___E__ and RD for external 8-bit data bus.  
ALE  
O
I
VCC2 ALE is a signal latching the address  
__________  
HOLD  
VCC2  
VCC2  
The microcomputer is placed in a hold state while the _H__O___L__D__ pin is held "L"  
Outputs an "L" signal while the microcomputer is placed in a hold state  
__________  
HLDA  
O
I
________  
RDY  
VCC2 Bus is placed in a wait state while the _R__D___Y__ pin is held "L"  
I : Input  
O : Output  
I/O : Input and output  
NOTES:  
1. VCC1 is hereinafter referred to as VCC unless otherwise noted.  
2. Apply 4.2 to 5.5V to the VCC1 and VCC2 pins when using M32C/84T. VCC1=VCC2.  
3. Bus cotrol pins in M32C/84T cannot be used.  
Page 15  
Rev. 1.21 Jul. 08, 2005  
of 85