M32C/83 Group (M32C/83, M32C/83T)
Vcc=5V
tc(TA)
t
w(TAH)
TAiIN input
t
w(TAL)
tc(UP)
t
w(UPH)
TAiOUT input
TAiOUT input
t
w(UPL)
(Counter increment/
decrement input)
In event counter mode
TAiIN input
(When counting on the falling edge)
t
h(TIN–UP)
tsu(UP–TIN)
TAiIN input
(When counting on the rising edge)
t
c(TB)
t
w(TBH)
TBiIN input
t
w(TBL)
t
c(AD)
t
w(ADL)
ADTRG input
tc(CK)
t
w(CKH)
CLKi
tw(CKL)
th(C–Q)
TxDi
RxDi
td(C–Q)
tsu(D–C)
th(C–D)
tw(INL)
INTi input
NMI input
t
w(INH)
2 clock cycles + 300ns 2 clock cycles + 300ns
or more ("L" width) or more
Figure 5.19 VCC = 5 V Timing Diagram(1)
Page 89
Rev. 1.41 Jan.31, 2006
REJ03B0013-0141
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