M32C/83 Group (M32C/83, M32C/83T)
1.2 Performance Overview
Tables 1.1 and 1.2 list performance overview of the M32C/83 Group (M32C/83, M32C/83T).
Table 1.1 M32C/83 Group (M32C/83, M32C/83T) Performance (144-Pin Package)
Characteristic
CPU
Basic Instructions
M32C/83
108 instructions
Performance
M32C/83T
Minimum Instruction Execution Time 31.3 ns (f(BCLK)=32 MHz, V
CC
=4.2 to 5.5 V)
(3)
31.3 ns (f(BCLK)=32 MHz, V
CC
=4.2 to 5.5 V)
(3)
50 ns (f(BCLK)=20 MHz, V
CC
=3.0 to 5.5 V)
Operating Mode
Address Space
Memory Capacity
Peripheral I/O Port
Function Multifunction Timer
Intelligent I/O
Single-chip mode, Memory expansion
Single-chip mode
mode and Microprocessor mode
16 Mbytes
See Table 1.3
123 I/O pins and 1 input pin
Timer A: 16 bits x 5 channels, Timer B: 16 bits x 6 channels
Three-phase motor control circuit
Time measurement function: 16 bits x 12 channels
Waveform generating function: 16 bits x 28 channels
Communication function (Clock synchronous serial I/O, Clock asynchronous se-
rial I/O, HDLC data processing, Clock synchronous variable length serial I/O,
IEBus
(1)
, 8-bit or 16-bit Clock synchronous serial I/O)
5 Channels
Clock synchronous serial I/O, Clock asynchronous serial I/O, IEBus
(1)
, I
2
C bus
(2)
1 channel Supporting CAN 2.0B specification
10-bit A/D converter: 2 circuit, 34 channels
8 bits x 2 channels
4 channels
Can be activated by all peripheral function interrupt sources
Immediate transfer, Calculation transfer and Chain transfer functions
CAS before RAS refresh, Self-reflesh, EDO, EP
CRC-CCITT
16 bits x 16 bits
15 bits x 1 channel (with prescaler)
42 internal and 8 external sources, 5 software sources, Interrupt priority level: 7
4 circuits
Main clock oscillation circuit(*), Sub clock oscillation circuit(*), On-chip oscillator,
PLL frequency synthesizer
(*)Equipped with a built-in feedback resistor. Ceramic resonator or crystal oscilla-
tor must be connected externally
Main clock oscillation stop detect function
4.2 to 5.5 V (f(BCLK)=32 MHz)
4.2 to 5.5 V (f(BCLK)=32 MHz)
3.0 to 5.5 V (f(BCLK)=20 MHz, through VDC)
3.0 to 3.6 V (f(BCLK)=20 MHz,
not through VDC)
41 mA (V
CC
=5 V, f(BCLK)=32 MHz)
41 mA (V
CC
=5 V, f(BCLK)=32 MHz)
38 mA (V
CC
=5 V, f(BCLK)=30 MHz)
38 mA (V
CC
=5 V, Vf(BCLK)=30 MHz)
26 mA (V
CC
=3.3 V, f(BCLK)=20 MHz)
470
µA
(V
CC
=5 V, f(X
CIN
)=32 kHz,
470
µA
(V
CC
=5 V, f(X
CIN
)=32 kHz,
in wait mode)
in wait mode)
0.4
µA
(V
CC
=5 V, stop mode)
340
µA
(V
CC
=3.3 V, f(X
CIN
)=32 kHz,
through VDC, in wait mode)
5.0
µA
(V
CC
=3.3 V, f(X
CIN
)=32 kHz,
not through VDC, in wait mode)
0.4
µA
(V
CC
=5 V, stop mode)
0.4
µA
(V
CC
=3.3 V, stop mode)
3.3
±
0.3 V or 5.0
±
0.5 V
5.0
±
0.5 V
100 times
–20 to 85
o
C, –40 to 85
o
C (optional)
–40 to 85
o
C (T version)
144-pin plastic molded LQFP
Serial I/O
CAN Module
A/D Converter
D/A Converter
DMAC
DMAC II
DRAM
CRC Calculation Circuit
X/Y Converter
Watchdog Timer
Interrupt
Clock Generation Circuit
Oscillation Stop Detect Function
Electrical Supply Voltage
Charact-
eristics
Power Consumption
Flash
Program/Erase Supply Voltage
Memory Program and Erase Endurance
Operating Ambient Temperature
Package
NOTES:
1. IEBus is a trademark of NEC Electronics Corporation.
2. I
2
C bus is a trademark of Koninklijke Philips Electronics N. V.
3. Contact our sales office if 30-MHz or higher frequency is required.
All options are on a request basis.
Rev. 1.41 Jan.31, 2006
REJ03B0013-0141
Page 2
of 91
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