Under development
This document is under development and its contents are subject to change.
M16C/6N Group (M16C/6NL, M16C/6NN)
Table 1.5 List of Pin Names for 100-Pin Package (2)
Pin No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Control
Pin
Port
P4_1
P4_0
P3_7
P3_6
P3_5
P3_4
P3_3
P3_2
P3_1
VCC2
P3_0
VSS
P2_7
P2_6
P2_5
P2_4
P2_3
P2_2
P2_1
P2_0
P1_7
P1_6
P1_5
P1_4
P1_3
P1_2
P1_1
P1_0
P0_7
P0_6
P0_5
P0_4
P0_3
P0_2
P0_1
P0_0
P10_7
P10_6
P10_5
P10_4
P10_3
P10_2
P10_1
AVSS
P10_0
VREF
AVCC
P9_7
P9_6
P9_5
SIN4
SOUT4
CLK4
AN0
AN2_7
AN2_6
AN2_5
AN2_4
AN2_3
AN2_2
AN2_1
AN2_0
Interrupt
Pin
Timer Pin
UART Pin
Analog CAN Module
Pin
Pin
1. Overview
Bus Control
Pin
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8(/-/D7)
A7(/D7/D6)
A6(/D6/D5)
A5(/D5/D4)
A4(/D4/D3)
A3(/D3/D2)
A2(/D2/D1)
A1(/D1/D0)
A0(/D0/-)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
_________
INT5
_________
INT4
_________
INT3
______
KI3
______
KI2
______
KI1
______
KI0
AN0_7
AN0_6
AN0_5
AN0_4
AN0_3
AN0_2
AN0_1
AN0_0
AN7
AN6
AN5
AN4
AN3
AN2
AN1
______________
ADTRG
ANEX1 CTX0
ANEX0 CRX0
Rev.2.10 Aug 25, 2006
REJ03B0061-0210
page 8 of 67
RENESAS [ RENESAS TECHNOLOGY CORP ]
