Under development
This document is under development and its contents are subject to change.
M16C/6N Group (M16C/6N4)
Table 1.3 List of Pin Names (1)
Pin No. Control
FP GP
Pin
1 99
2 100
3
1
4
2
5
3
6
4
7
5
8
6 BYTE
9
7 CNVSS
10 8 XCIN
11 9 XCOUT
____________
12 10 RESET
13 11 XOUT
14 12 VSS
15 13 XIN
16 14 VCC1
17 15
18 16
19 17
20 18
21 19
22 20
23 21
24 22
25 23
26 24
27 25
28 26
29 27
30 28
31 29
32 30
33 31
34 32
35 33
36 34
37 35
38 36
39 37
40 38
41 39
42 40
43 41
44 42
45 43
46 44
47 45
48 46
49 47
50 48
Port
P9_6
P9_5
P9_4
P9_3
P9_2
P9_1
P9_0
Interrupt
Pin
Timer Pin
UART Pin
1. Overview
Analog CAN Module
Bus Control Pin
Pin
Pin
ANEX1
ANEX0
DA1
DA0
CTX0
CRX0
TB4IN
TB3IN
TB2IN
TB1IN
TB0IN
SOUT3
SIN3
CLK3
P8_7
P8_6
_______
P8_5
P8_4
P8_3
P8_2
P8_1
P8_0
P7_7
P7_6
P7_5
P7_4
P7_3
P7_2
P7_1
P7_0
P6_7
P6_6
P6_5
P6_4
P6_3
P6_2
P6_1
P6_0
P5_7
P5_6
P5_5
P5_4
P5_3
P5_2
P5_1
P5_0
P4_7
P4_6
P4_5
P4_4
NMI
________
INT2
INT1
INT0
ZP
___
TA4IN/U
TA4OUT/U
TA3IN
TA3OUT
____
TA2IN/W
TA2OUT/W
___
TA1IN/V
TA1OUT/V
TA0IN/TB5IN
TA0OUT
CRX1
CTX1
__________ __________
CTS2/RTS2
CLK2
RXD2/SCL2
TXD2/SDA2
TXD1/SDA1
RXD1/SCL1
CLK1
_________ _________ _________
CTS1/RTS1/CTS0/CLKS1
TXD0/SDA0
RXD0/SCL0
CLK0
__________ __________
CTS0/RTS0
________
RDY/CLKOUT
ALE
__________
HOLD
__________
HLDA
BCLK
_____
RD
_________ ________
WRH/BHE
________ ______
WRL/WR
_______
CS3
_______
CS2
_______
CS1
_______
CS0
FP: PRQP0100JB-A (100P6S-A), GP: PLQP0100KB-A (100P6Q-A)
Rev.2.40 Aug 25, 2006
REJ03B0003-0240
page 7 of 88
RENESAS [ RENESAS TECHNOLOGY CORP ]
