HD74LS93
4-bit Binary Counter
REJ03D0423–0200
Rev.2.00
Feb.18.2005
The HD74LS93 contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and
three-state binary counter for divide-by-eight. To use this maximum count length of this counter, the B input is
connected to the Q
A
output. The input count pulses are applied to input A and the outputs are described in the
appropriate function table.
Features
•
Ordering Information
Part Name
HD74LS93P
HD74LS93FPEL
Package Type
DILP-14 pin
SOP-14 pin (JEITA)
Package Code
(Previous Code)
PRDP0014AB-B
(DP-14AV)
PRSP0014DF-B
(FP-14DAV)
Package
Abbreviation
P
FP
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
Note: Please consult the sales office for the above package availability.
Pin Arrangement
B
R
0(1)
R
0(2)
NC
V
CC
NC
NC
1
2
3
4
5
6
7
Q
C
Q
B
B
R
0(1)
R
0(2)
A
14
13
Q
A
Q
D
12
11
10
9
8
A
NC
Q
A
Q
D
GND
Q
B
Q
C
(Top view)
Rev.2.00, Feb.18.2005, page 1 of 8
RENESAS [ RENESAS TECHNOLOGY CORP ]
