HD74LS75
Quadruple Bistable Latches
REJ03D0416-0300
Rev.3.00
May 10, 2006
The HD74LS75 is ideally suited for use as temporary storage for binary information between processing units and
input / output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable
(G) is high and the Q output will follow the data input as long as the enable remains high. When the enable goes low,
the information (that was present at the data input at the time the transition occurred) is retained at the Q output until the
enable is permitted to go high. This device features complementary Q and
Q
outputs from a 4-bit latch.
Features
•
Ordering Information
Part Name
HD74LS75P
HD74LS75FPEL
Package Type
DILP-16 pin
SOP-16 pin (JEITA)
Package Code
(Previous Code)
PRDP0016AE-B
(DP-16FV)
PRSP0016DH-B
(FP-16DAV)
Package
Abbreviation
P
FP
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
Note: Please consult the sales office for the above package availability.
Pin Arrangement
1Q
1D
2D
Enable 3-4
V
CC
3D
4D
4Q
1
Q
2
3
4
5
6
7
8
Q
Q
Q
G
G
G
G
Q
D
D
Q
Q
D
D
Q
16
15
14
13
12
11
10
9
1Q
2Q
2Q
Enable 1-2
GND
3Q
3Q
4Q
(Top view)
Rev.3.00, May 10, 2006, page 1 of 5
RENESAS [ RENESAS TECHNOLOGY CORP ]
