HD74LS257
Quadruple 2-line-to-1-line Data Selectors / Multiplexers
(with not inverted 3-state outputs)
REJ03D0469–0300
Rev.3.00
Jul.15.2005
This multiplexer features three-state outputs that can interface directly with and drive data lines of bus-organized
systems. With all but one of the common outputs disabled (at a high-impedance state) the low impedance of the single
enabled output will drive the bus line to a high or low logic level.
To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels, the output-
enable circuitry is designed such that the output disable times are shorter than the output enable times.
Features
•
Ordering Information
Part Name
HD74LS257P
HD74LS257FPEL
Package Type
DILP-16 pin
SOP-16 pin (JEITA)
Package Code
(Previous Code)
PRDP0016AE-B
(DP-16FV)
Package
Abbreviation
P
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
PRSP0016DH-B
FP
(FP-16DAV)
Note: Please consult the sales office for the above package availability.
Pin Arrangement
Select
1A
1B
1Y
2A
2B
2Y
GND
1
S
2
3
4
5
6
7
8
1A
1B
1Y
2A
2B
2Y
3Y
OC
4A
4B
4Y
3A
3B
16
15
14
13
12
11
10
9
V
CC
Output
Control
4A
4B
4Y
3A
3B
3Y
(Top view)
Rev.3.00, Jul.15.2005, page 1 of 5
RENESAS [ RENESAS TECHNOLOGY CORP ]
