HD74LS125A
Quadruple Bus Buffer Gates (with three-state outputs)
REJ03D0430–0200
Rev.2.00
Feb.18.2005
Features
•
Ordering Information
Part Name
HD74LS125AP
HD74LS125AFPEL
HD74LS125ARPEL
Package Type
DILP-14 pin
SOP-14 pin (JEITA)
SOP-14 pin (JEDEC)
Package Code
(Previous Code)
PRDP0014AB-B
(DP-14AV)
PRSP0014DF-B
(FP-14DAV)
Package
Abbreviation
P
FP
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
PRSP0014DE-A
RP
(FP-14DNV)
Note: Please consult the sales office for the above package availability.
Pin Arrangement
1C
1A
1Y
2C
2A
2Y
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
4C
4A
4Y
3C
3A
3Y
(Top view)
Function Table
Inputs
C
H
L
L
Note: H ; high level,
L ; low level,
X ; irrelevant,
Z ; off (high-impedance) state of a 3-state output
A
X
L
H
Outputs
Y
Z
L
H
Rev.2.00, Feb.18.2005, page 1 of 4