HD74LS107A
Dual J-K Negative-edge-triggered Flip-Flops (with Clear)
REJ03D0425–0300
Rev.3.00
Jul.13.2005
Features
•
Ordering Information
Part Name
HD74LS107AP
HD74LS107AFPEL
Package Type
DILP-14 pin
SOP-14 pin (JEITA)
Package Code
(Previous Code)
PRDP0014AB-B
(DP-14AV)
PRSP0014DF-B
(FP-14DAV)
Package
Abbreviation
P
FP
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
Note: Please consult the sales office for the above package availability.
Pin Arrangement
1J
1Q
1Q
1K
2Q
2Q
GND
1
2
3
4
5
6
7
K
CK
Q
CLR J
Q
CLR J
CK
Q
K
Q
14
13
12
11
10
9
8
V
CC
1CLR
1CK
2K
2CLR
2CK
2J
(Top view)
Function Table
Inputs
Outputs
Clear
Clock
J
K
Q
Q
L
X
X
X
L
H
H
↓
L
L
Q
O
Q
O
H
↓
H
L
H
L
H
↓
L
H
L
H
H
↓
H
H
Toggle
H
H
X
X
Q
O
Q
O
Notes: H; high level, L; low level, X; irrelevant
↓;
transition from high to low level
Q; level of Q before the indicated steady-state input conditions were established.
Q;
complement of Q
O
or level of
Q
before the indicated steady-state input conditions were established.
Toggle; each output changes to the complement of its previous level on each active transition indicated by
↓.
Rev.3.00, Jul.13.2005, page 1 of 6