HD74HC125/HD74HC126
Quad. Bus Buffer Gates (with 3-state outputs)
REJ03D0565-0200
(Previous ADE-205-439)
Rev.2.00
Oct 11, 2005
Description
The HD74HC125, HD74HC126 require the 3-state control input C to be taken high to put the output into the high
impedance condition, whereas the HD74HC125, HD74HC126 requires the control input to be low to put the output into
high impedance.
Features
•
•
•
•
•
•
High Speed Operation: t
pd
= 8 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 15 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 to 6 V
Low Input Current: 1
µA
max
Low Quiescent Supply Current: I
CC
(static) = 4
µA
max (Ta = 25°C)
Ordering Information
Part Name
HD74HC125P
HD74HC126P
HD74HC125FPEL
HD74HC125FPEL
HD74HC126RPEL
Package Type
DILP-14 pin
SOP-14 pin (JEITA)
SOP-14 pin (JEDEC)
Package Code
(Previous Code)
PRDP0014AB-B
(DP-14AV)
PRSP0014DF-B
(FP-14DAV)
Package
Abbreviation
P
FP
—
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
ELL (2,000 pcs/reel)
Taping Abbreviation
(Quantity)
PRSP0014DE-A
RP
(FP-14DNV)
HD74HC125TELL
PTSP0014JA-B
TSSOP-14 pin
T
HD74HC126TELL
(TTP-14DV)
Note: Please consult the sales office for the above package availability.
Function Table
Inputs
C
HC125
H
L
L
H:
L:
X:
Z:
HC126
L
H
H
X
L
H
A
HC125
Z
L
H
Output
Y
HC126
Z
L
H
High level
Low level
Irrelevant
Off (high-impedance) state of a 3-state output.
Rev.2.00, Oct 11, 2005 page 1 of 8
RENESAS [ RENESAS TECHNOLOGY CORP ]
