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HD74HC163FPEL 参数 Datasheet PDF下载

HD74HC163FPEL图片预览
型号: HD74HC163FPEL
PDF下载: 下载PDF文件 查看货源
内容描述: 同步十进制计数器(直接清除) [Synchronous Decade Counter (Direct Clear)]
分类和应用: 计数器触发器逻辑集成电路光电二极管
文件页数/大小: 15 页 / 159 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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HD74HC160/HD74HC161/HD74HC162/
HD74HC163
Synchronous Decade Counter (Direct Clear)
Synchronous 4-bit Binary Counter (Direct Clear)
Synchronous Decade Counter (Synchronous Clear)
Synchronous 4-bit Binary Counter (Synchronous Clear)
REJ03D0579-0200
(Previous ADE-205-455)
Rev.2.00
Oct 11, 2005
Description
The HD74HC160 and the HD74HC162 are 4 bit decade counters, and the HD74HC161 and the HD74HC163 are 4 bit
binary counters All flip-flops are clocked simultaneously on the low to high to transition (positive edge) of the clock
input waveform.
These counters may be preset using the load input. Presetting of all four flip-flops is synchronous to the rising edge of
clock. When load is held low counting is disabled and the data on the A, B, C, and D inputs is loaded into the counter
on the rising edge of clock. If the load input is taken high before the positive edge of clock the count operation will be
unaffected.
All of these counters may be cleared by the utilizing clear input. The clear function on the HD74HC162 and
HD74HC163 counters are synchronous to the clock. That is, the counters are cleared on the positive edge of clock
while the clear input is held low.
The HD74HC160 and HD74HC161 counters are cleared asynchronously. When the clear is taken low the counter is
cleared immediately regardless of the clock.
Two active high enable inputs Enable P and Enable T and a ripple carry output are provided to enable easy cascading of
counters. Both enable inputs must be high to count. The Enable T input also enables the Ripple Carry output. When
enabled, the Ripple Carry outputs a positive pulse when the counter overflows. This pulse is approximately equal in
duration to the high level portion of the Q
A
outputs. The Ripple Carry output is fed to successive cascaded stages to
facilitate easy implementation of N-bit counters.
Features
High Speed Operation: t
pd
(Clock to Q) = 18 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 to 6 V
Low Input Current: 1
µA
max
Low Quiescent Supply Current: I
CC
(static) = 4
µA
max (Ta = 25°C)
Rev.2.00, Oct 11, 2005 page 1 of 14