HD74HC107
Dual J-K Flip-Flops (with Clear)
REJ03D0559-0200
(Previous ADE-205-432)
Rev.2.00
Oct 06, 2005
Description
This flip-flop is edge sensitive to the clock input and change state on the negative going transition of the clock pulse.
Each one has independent J, K, clock, and clear inputs and Q and Q outputs. Clear is independent of the clock and
accomplished by a low level on the input.
Features
•
•
•
•
•
•
High Speed Operation: t
pd
(Clock to Q) = 19 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 to 6 V
Low Input Current: 1
µA
max
Low Quiescent Supply Current: I
CC
(static) = 2
µA
max (Ta = 25°C)
Ordering Information
Part Name
HD74HC107P
HD74HC107FPEL
HD74HC107RPEL
Package Type
DILP-14 pin
SOP-14 pin (JEITA)
SOP-14 pin (JEDEC)
Package Code
(Previous Code)
PRDP0014AB-B
(DP-14AV)
PRSP0014DF-B
(FP-14DAV)
PRSP0014DE-A
(FP-14DNV)
Package
Abbreviation
P
FP
RP
—
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
Taping Abbreviation
(Quantity)
Note: Please consult the sales office for the above package availability.
Function Table
Inputs
Clear
L
H
H
H
H
H
H
H:
L:
X:
H
High level
Low level
Irrelevant
L
H
Clock
X
J
X
L
L
H
H
X
X
X
K
X
L
H
L
H
X
X
X
Q
L
No change
L
H
Toggle
No change
No change
No change
H
L
Outputs
Q
H
Rev.2.00, Oct 06, 2005 page 1 of 7