2.7.2
Access to On-Chip Supporting Modules and External Devices
The on-chip supporting module registers and external devices are accessed in a cycle consisting of
three states: T1, T2, and T3. Only one byte of data can be accessed per cycle, via an 8-bit data bus.
Access to word data or instruction codes requires two consecutive cycles (six states).
Figure 2.15 shows the access cycle for the on-chip supporting modules. Figure 2.16 shows the
associated pin states. Figures 2.17 (a) and (b) show the read and write access timing for external
devices.
Bus cycle
T2 state
Address
T3 state
T1 state
ø
Internal address
bus
Internal read
signal
Internal data bus
(read)
Read data
Internal write
signal
Internal data bus
(write)
Write data
Figure 2.15 On-Chip Supporting Module Access Cycle
59
RENESAS [ RENESAS TECHNOLOGY CORP ]
