HD64F3337YF16 参数 Datasheet PDF下载

Preface

The H8/3337 Series and H8/3397 Series is a high-performance single-chip microcomputer that

integrates peripheral functions necessary for system configuration with an H8/300 CPU featuring a

32-bit internal architecture as its core.

On-chip peripheral functions include ROM, RAM, four kinds of timers, a serial communication

interface (SCI), host interface (HIF), keyboard controller, D/A converter, A/D converter, and I/O

ports, enabling the H8/3337 Series and H8/3397 Series to be used as a microcontroller for

embedding in high-speed control systems. Flash memory (F-ZTAT™ *), PROM (ZTAT® *), and

mask ROM are available as on-chip ROM, enabling users to respond quickly and flexibly to

changing application specifications and the demands of the transition from initial to full-fledged

volume production.

Note: * F-ZTAT is a trademark of Hitachi, Ltd.

ZTAT is a registered trademark of Hitachi, Ltd.

Intended Readership: This manual is intended for users undertaking the design of an application

system using a H8/3337 Series and H8/3397 Series microcomputer.

Readers using this manual require a basic knowledge of electrical circuits,

logic circuits, and microcomputers.

Purpose:

The purpose of this manual is to give users an understanding of the

hardware functions and electrical characteristics of the H8/3337 Series and

H8/3397 Series. Details of execution instructions can be found in the

H8/300 Series Programming Manual, which should be read in conjunction

with the present manual.

Using this Manual:

•

For an overall understanding of the H8/3337 Series’ and H8/3397 Series’ functions

Follow the Table of Contents. This manual is broadly divided into sections on the CPU, system

control functions, peripheral functions, and electrical characteristics.

•

For a detailed understanding of CPU functions

Refer to the separate publication H8/300 Series Programming Manual.

•

For a detailed description of a register’s function when the register name is known.

Information on addresses, bit contents, and initialization is summarized in Appendix B,

Internal I/O Register.

Note on bit notation: Bits are shown in high-to-low order from left to right.

Related Material:

The latest information is available at our Web Site. Please make sure that you

have the most up-to-date information available.

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