Table 2.2 Effective Address Calculation
Addressing Mode and
Instruction Format
Effective Address
Calculation
No.
Effective Address
3
0
3
0
1
Register direct, Rn
regm
regn
15
8 7
4 3
0
op
regm regn
Operands are contained in
registers regm and regn
15
0
2
3
Register indirect, @Rn
16-bit register contents
15
0
15
7 6 4 3
0
op
reg
Register indirect with
displacement, @(d:16, Rn)
15
0
16-bit register contents
15
0
15
7 6 4 3
0
op
reg
disp
disp
4
Register indirect with
post-increment, @Rn+
15
0
15
0
16-bit register contents
15
7 6 4 3
0
op
reg
1 or 2*
Register indirect with
pre-decrement, @–Rn
15
0
16-bit register contents
15
0
15
7 6 4 3
0
op
reg
1 or 2*
Note: * 1 for a byte operand,
2 for a word operand
35
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