1.3.2
Pin Functions
Pin Assignments in Each Operating Mode: Table 1.2 (a) and table 1.2 (b) lists the assignments
of the pins of the FP-80A, TFP-80, CP-84, and CG-84 packages in each operating mode.
Table 1.2 (a) Pin Assignments for H8/3337 Series in Each Operating Mode
Pin No.
Expanded Modes
Single-Chip Mode
Mode 3
Flash
EPROM Memory
Writer Writer
FP-80A, CP-84,
HIF
HIF
TFP-80C CG-84 Mode 1
Mode 2
RES
Disabled
Enabled
Mode
Mode
RES
XTAL
EXTAL
VSS
1
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
RES
RES
RES
VPP
2
XTAL
EXTAL
MD1
XTAL
EXTAL
MD1
XTAL
EXTAL
MD1
XTAL
EXTAL
MD1
NC
3
NC
4
VSS
5
MD0
MD0
MD0
MD0
VSS
VSS
6
NMI
NMI
NMI
NMI
EA9
FA9
FVPP
VCC
7
STBY
VCC
STBY/FVPP
VCC
STBY/FVPP STBY/FVPP VSS
8
VCC
VCC
VCC
NC
NC
NC
VSS
VSS
NC
NC
NC
NC
NC
PGM
EA15
9
P52/SCK0
P51/RxD0
P50/TxD0
VSS
P52/SCK0
P51/RxD0
P50/TxD0
VSS
P52/SCK0
P51/RxD0
P50/TxD0
VSS
P52/SCK0
P51/RxD0
P50/TxD0
VSS
NC
10
11
12
—
13
14
15
16
17
18
19
NC
NC
VSS
VSS
VSS
VSS
VSS
VSS
P97/WAIT/SDA P97/WAIT/SDA P97/SDA
P97/SDA
P96/ø
P95
VCC
ø
ø
P96/ø
P95
NC
AS
AS
FA16
FA15
WE
VSS
WR
RD
WR
RD
P94
P94
P93
P93
P92/IRQ0
P92/IRQ0
P92/IRQ0
P92/IRQ0
P91/IRQ1 when HIF is disabled or STAC bit is 0 in STCR;
EIOW/IRQ1 when HIF is enabled and STAC bit is 1
VCC
20
21
32
33
P90/IRQ2/ADTRG when HIF is disabled or STAC bit is 0 in
STCR; ECS2/IRQ2 when HIF is enabled and STAC bit is 1
EA16
NC
VCC
NC
P60/FTCI/
P60/FTCI/
P60/FTCI/
P60/FTCI/
KEYIN0
KEYIN0
KEYIN0
KEYIN0
12
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