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HD64F3337YF16 参数 Datasheet PDF下载

HD64F3337YF16图片预览
型号: HD64F3337YF16
PDF下载: 下载PDF文件 查看货源
内容描述: 单片机 [Single-Chip Microcomputer]
分类和应用: 微控制器和处理器外围集成电路
文件页数/大小: 747 页 / 2993 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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Receiving Serial Data: Follow the procedure in figure 12.15 for receiving serial data. When  
switching from asynchronous mode to synchronous mode, be sure to check that PER and FER are  
cleared to 0. If PER or FER is set to 1 the RDRF bit will not be set and both transmitting and  
receiving will be disabled.  
1
Initialize  
1. SCI initialization: the receive data function of the  
RxD pin is selected automatically.  
Start receiving  
2. Receive error handling: if a receive error occurs,  
read the ORER bit in SSR then, after executing  
the necessary error handling, clear ORER to 0.  
Neither transmitting nor receiving can resume  
while ORER remains set to 1. When clock  
output mode is selected, receiving can be halted  
temporarily by receiving one dummy byte and  
causing an overrun error. When preparations  
to receive the next data are completed, clear  
the ORER bit to 0. This causes receiving to  
Read ORER bit in SSR  
Yes  
2
ORER = 1?  
No  
Error handling  
resume, so return to the step marked 2 in the  
flowchart.  
Read RDRF in SSR  
3
3. SCI status check and receive data read: read  
the serial status register (SSR), check that  
RDRF is set to 1, then read receive data from  
the receive data register (RDR) and clear RDRF  
to 0. Transition of the RDRF bit from 0 to 1  
can be reported by an RXI interrupt.  
No  
RDRF = 1?  
Yes  
Read receive data  
from RDR, and clear  
RDRF bit to 0 in SSR  
4
4. To continue receiving serial data: read RDR and  
clear RDRF to 0 before the MSB (bit 7) of the  
current frame is received.  
No  
Finished  
receiving?  
Yes  
Clear RE to 0 in SCR  
End  
Start error handling  
Overrun error handling  
Clear ORER to 0 in SSR  
Return  
Figure 12.15 Sample Flowchart for Serial Receiving  
275  
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