Section 13 Timer Z
B. External clock operation
An external clock input pin (TCLK) can be selected by bits TPSC2 to TPSC0 in TCR, and
a detection edge can be selected by bits CKEG1 and CKEG0. To detect an external clock,
the rising edge, falling edge, or both edges can be selected. The pulse width of the external
clock needs two or more system clocks. Note that an external clock does not operate
correctly with the lower pulse width.
Figure 13.11 illustrates the detection timing of the rising and falling edges.
φ
External clock input pin
TCNT input
TCNT
N-1
N
N+1
Figure 13.11 Count Timing at External Clock Operation (Both Edges Detected)
Rev. 3.00 Sep. 10, 2007 Page 226 of 528
REJ09B0216-0300
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