Figure 16.4
Figure 16.5
Figure 16.6
Figure 16.7
Figure 16.8
MD1/TxD2 Pin................................................................................................. 683
MD2/RxD2 Pin ................................................................................................ 683
Sample SCIF Initialization Flowchart.............................................................. 689
Sample Serial Transmission Flowchart............................................................ 690
Example of Transmit Operation (Example with 8-Bit Data, Parity,
One Stop Bit).................................................................................................... 692
Example of Operation Using Modem Control (&765)..................................... 692
Sample Serial Reception Flowchart (1)............................................................ 693
Sample Serial Reception Flowchart (2)............................................................ 694
Example of SCIF Receive Operation (Example with 8-Bit Data, Parity,
Figure 16.9
Figure 16.10
Figure 16.10
Figure 16.11
One Stop Bit).................................................................................................... 696
Example of Operation Using Modem Control (5765)..................................... 696
Receive Data Sampling Timing in Asynchronous Mode ................................. 699
Overrun Error Flag........................................................................................... 701
Block Diagram of Smart Card Interface........................................................... 704
Schematic Diagram of Smart Card Interface Pin Connections......................... 711
Smart Card Interface Data Format ................................................................... 712
TEND Generation Timing................................................................................ 714
Sample Start Character Waveforms ................................................................. 715
Difference in Clock Output According to GM Bit Setting............................... 717
Sample Initialization Flowchart ....................................................................... 719
Sample Transmission Processing Flowchart.................................................... 721
Sample Reception Processing Flowchart ......................................................... 723
Receive Data Sampling Timing in Smart Card Mode...................................... 725
Retransfer Operation in SCI Receive Mode..................................................... 726
Retransfer Operation in SCI Transmit Mode ................................................... 727
Procedure for Stopping and Restarting the Clock ............................................ 728
16-Bit Port........................................................................................................ 732
4-Bit Port.......................................................................................................... 733
MD0/SCK Pin .................................................................................................. 734
MD7/TxD Pin................................................................................................... 735
RxD Pin............................................................................................................ 735
MD1/TxD2 Pin................................................................................................. 736
MD2/RxD2 Pin ................................................................................................ 736
&765 Pin .......................................................................................................... 737
MD8/5765 Pin................................................................................................. 738
Block Diagram of INTC................................................................................... 752
Example of IRL Interrupt Connection.............................................................. 755
Interrupt Operation Flowchart.......................................................................... 769
Block Diagram of User Break Controller......................................................... 774
User Break Debug Support Function Flowchart .............................................. 794
Block Diagram of H-UDI Circuit..................................................................... 800
TAP Control State Transition Diagram............................................................ 810
Figure 16.12
Figure 16.13
Figure 16.14
Figure 17.1
Figure 17.2
Figure 17.3
Figure 17.4
Figure 17.5
Figure 17.6
Figure 17.7
Figure 17.8
Figure 17.9
Figure 17.10
Figure 17.11
Figure 17.12
Figure 17.13
Figure 18.1
Figure 18.2
Figure 18.3
Figure 18.4
Figure 18.5
Figure 18.6
Figure 18.7
Figure 18.8
Figure 18.9
Figure 19.1
Figure 19.2
Figure 19.3
Figure 20.1
Figure 20.2
Figure 21.1
Figure 21.2
Rev. 6.0, 07/02, page xlii of I
RENESAS [ RENESAS TECHNOLOGY CORP ]
