Figure 14.54
Figure 14.55
DTR Format (Transfer Request Format) (SH7750R)....................................... 584
Single Address Mode/Burst Mode/External Bus External Device
→
32-Byte Block Transfer/Channel 0 On-Demand Data Transfer....................... 589
Single Address Mode/Burst Mode/External Bus External Device/
Figure 14.56
→
32-Byte Block Transfer/On-Demand Data Transfer on Channel 4 .................. 590
Block Diagram of SCI...................................................................................... 595
MD0/SCK Pin .................................................................................................. 611
MD7/TxD Pin................................................................................................... 612
RxD Pin............................................................................................................ 612
Data Format in Asynchronous Communication (Example with 8-Bit Data,
Parity, Two Stop Bits)...................................................................................... 623
Relation between Output Clock and Transfer Data Phase
Figure 15.1
Figure 15.2
Figure 15.3
Figure 15.4
Figure 15.5
Figure 15.6
(Asynchronous Mode)...................................................................................... 625
Sample SCI Initialization Flowchart ................................................................ 626
Sample Serial Transmission Flowchart............................................................ 627
Example of Transmit Operation in Asynchronous Mode
Figure 15.7
Figure 15.8
Figure 15.9
(Example with 8-Bit Data, Parity, One Stop Bit)............................................. 629
Sample Serial Reception Flowchart (1)............................................................ 630
Sample Serial Reception Flowchart (2)............................................................ 631
Example of SCI Receive Operation
Figure 15.10
Figure 15.10
Figure 15.11
(Example with 8-Bit Data, Parity, One Stop Bit)............................................. 633
Example of Inter-Processor Communication Using Multiprocessor Format
(Transmission of Data H'AA to Receiving Station A) ..................................... 635
Sample Multiprocessor Serial Transmission Flowchart................................... 636
Example of SCI Transmit Operation (Example with 8-Bit Data,
Figure 15.12
Figure 15.13
Figure 15.14
Multiprocessor Bit, One Stop Bit).................................................................... 638
Sample Multiprocessor Serial Reception Flowchart (1)................................... 639
Sample Multiprocessor Serial Reception Flowchart (2)................................... 640
Example of SCI Receive Operation (Example with 8-Bit Data,
Figure 15.15
Figure 15.15
Figure 15.16
Multiprocessor Bit, One Stop Bit).................................................................... 641
Data Format in Synchronous Communication ................................................. 642
Sample SCI Initialization Flowchart ................................................................ 644
Sample Serial Transmission Flowchart............................................................ 645
Example of SCI Transmit Operation................................................................ 646
Sample Serial Reception Flowchart (1)............................................................ 647
Sample Serial Reception Flowchart (2)............................................................ 648
Example of SCI Receive Operation ................................................................. 649
Sample Flowchart for Serial Data Transmission and Reception ...................... 650
Receive Data Sampling Timing in Asynchronous Mode ................................. 654
Example of Synchronous Transmission by DMAC ......................................... 655
Block Diagram of SCIF.................................................................................... 659
MD8/5765 Pin................................................................................................. 681
&765 Pin .......................................................................................................... 682
Figure 15.17
Figure 15.18
Figure 15.19
Figure 15.20
Figure 15.21
Figure 15.21
Figure 15.22
Figure 15.23
Figure 15.24
Figure 15.25
Figure 16.1
Figure 16.2
Figure 16.3
Rev. 6.0, 07/02, page xli of I
RENESAS [ RENESAS TECHNOLOGY CORP ]
