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HD6417750SBP200 参数 Datasheet PDF下载

HD6417750SBP200图片预览
型号: HD6417750SBP200
PDF下载: 下载PDF文件 查看货源
内容描述: 的SuperH RISC引擎 [SuperH RISC engine]
分类和应用: 外围集成电路时钟
文件页数/大小: 1039 页 / 6201 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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When an FPU operation instruction is executed, the FPU exception cause field is cleared to  
zero first. When the next FPU exception is occured, the corresponding bits in the FPU  
exception cause field and FPU exception flag field are set to 1. The FPU exception flag field  
holds the status of the exception generated after the field was last cleared.  
RM: Rounding mode  
RM = 00: Round to Nearest  
RM = 01: Round to Zero  
RM = 10: Reserved  
RM = 11: Reserved  
Bits 22 to 31: Reserved  
Floating-point communication register, FPUL (32 bits, initial value undefined): Data transfer  
between FPU registers and CPU registers is carried out via the FPUL register.  
Programming Note: When SZ = 1 and big endian mode is selected, FMOV can be used for  
double-precision floating-point load or store operations. In little endian mode, two 32-bit data size  
moves must be executed, with SZ = 0, to load or store a double-precision floating-point number.  
2.3  
Memory-Mapped Registers  
Appendix A, Address List shows the control registers mapped to memory. The control registers  
are double-mapped to the following two memory areas. All registers have two addresses.  
H'1C00 0000–H'1FFF FFFF  
H'FC00 0000–H'FFFF FFFF  
These two areas are used as follows.  
H'1C00 0000–H'1FFF FFFF  
This area must be accessed using the address translation function of the MMU. Setting the  
page number of this area to the corresponding filed of the TLB enables access to a memory-  
mapped register. Accessing this area without using the address translation function of the  
MMU is not guaranteed.  
H'FC00 0000–H'FFFF FFFF  
Access to area H'FF00 0000–H'FFFF FFFF in user mode will cause an address error. Memory-  
mapped registers can be referenced in user mode by means of access that involves address  
translation.  
Note: Do not access undefined locations in either area The operation of an access to an  
undefined location is undefined. Also, memory-mapped registers must be accessed using a  
fixed data size. The operation of an access using an invalid data size is undefined.  
Rev. 6.0, 07/02, page 52 of 986  
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