CD4051B, CD4052B, CD4053B
Electrical Specifications
Common Conditions Here: If Whole Table is For the Full Temp. Range, V
SUPPLY
=
±5V,
A
V
= +1,
R
L
= 100Ω, Unless Otherwise Specified
(Continued)
(Note 3)
CONDITIONS
LIMITS AT INDICATED TEMPERATURES (
o
C)
25
PARAMETER
V
IS
(V)
V
EE
(V)
V
SS
(V)
V
DD
(V)
-55
-40
85
125
MIN
TYP
MAX
UNITS
CONTROL (ADDRESS OR INHIBIT), V
C
V
IL
= V
DD
through
1kΩ;
V
IH
= V
DD
through
Input High Voltage, V
IH
, 1kΩ
Min
Input Low Voltage, V
IL
,
Max
V
EE
= V
SS
,
R
L
= 1kΩ to V
SS
,
I
IS
< 2µA on All
OFF Channels
5
10
15
5
10
15
Input Current, I
IN
(Max)
Propagation Delay Time:
Address-to-Signal
t
r
, t
f
= 20ns,
OUT (Channels ON or C
L
= 50pF,
OFF) See Figures 10, R
L
= 10kΩ
11, 14
0
0
0
-5
Propagation Delay Time:
Inhibit-to-Signal OUT t
r
, t
f
= 20ns,
(Channel Turning ON) C
L
= 50pF,
See Figure 11
R
L
= 1kΩ
0
0
0
-10
Propagation Delay Time:
Inhibit-to-Signal OUT
(Channel Turning
OFF) See Figure 15
t
r
, t
f
= 20ns,
C
L
= 50pF,
R
L
= 10kΩ
0
0
0
-10
Input Capacitance, C
IN
(Any Address or Inhibit
Input)
NOTE:
2. Determined by minimum feasible leakage measurement for automatic testing.
0
0
0
0
5
10
15
5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
200
90
70
130
5
450
210
160
300
7.5
ns
ns
ns
ns
pF
0
0
0
0
5
10
15
5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
400
160
120
200
720
320
240
400
ns
ns
ns
ns
0
0
0
0
5
10
15
5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
450
160
120
225
720
320
240
450
ns
ns
ns
ns
V
IN
= 0, 18
18
1.5
3
4
3.5
7
11
±0.1
1.5
3
4
3.5
7
11
±0.1
1.5
3
4
3.5
7
11
±1
1.5
3
4
3.5
7
11
±1
-
-
-
3.5
7
11
-
-
-
-
-
-
-
±10
-5
1.5
3
4
-
-
-
±0.1
V
V
V
V
V
V
µA
Electrical Specifications
TEST CONDITIONS
PARAMETER
Cutoff (-3dB) Frequency Chan-
nel ON (Sine Wave Input)
V
IS
(V)
5 (Note 3)
V
EE
= V
SS
,
V
OS
-
20Log
----------- = –
3dB
V
IS
V
DD
(V)
10
R
L
(kΩ)
1
V
OS
at Common OUT/IN
CD4053
CD4052
CD4051
V
OS
at Any Channel
LIMITS
TYP
30
25
20
60
UNITS
MHz
MHz
MHz
MHz
6
RENESAS [ RENESAS TECHNOLOGY CORP ]
