APPENDIX
Appendix 6. Machine instructions
Addressing Modes
Operation
Symbol
Function
IMP
op
IMM
A
n
DIR DIR, X DIR, Y (DIR) (DIR, X) (DIR), Y L(DIR) L(DIR), Y
length (Bit)
n
#
op
n
#
op
#
op
n
# op
n
#
op
n
#
op
n
# op
n
#
op
n
#
op
n
#
op
n
#
E←M32
32
2C
3
5
8A
6
2
8B
7
2
11
80
9
3
11 10
81
3
88
9
2
11 11
82
3
89 11
2
LDAD
LDD n
(Notes 11
and 12)
DPRn←IMM16
(n = 0 to 3. Multiple DPRs can
be specified.)
16
B8 13
?0
4
B8 11
2
+
?0
+
2 i 2 i
LDT
DT←IMM8
8
31
4A
4
1
1
3
2
2
LDX
(Note 8)
X←M
16/8
16
C6
27
02
3
2
41
05
5 3
LDXB
X←IMM8 (Extension zero)
LDY
(Note 8)
Y←M
16/8
16
41
1B
5 3
D6
37
1
1
2
2
12 3 2
LDYB
Y←IMM8 (Extension zero)
Logical shift to the right by 1 bit
LSR
(Note 1)
16/8
43
1
2
1
21
7
3
21
2B
8 3
2A
m = 0
Acc or M16
0→ b15 … b0 →C
81
43
2
2
m = 1
Acc or M8
0→ b7 … b0 →C
L
LSR #n
(Note 4)
Logical shift to the right by n bits (n =
0 to 15)
16/8
C1
6
+
imm
m = 0
A
0→ b15 … b0 →C
m = 1
A
L
0→ b7 … b0 →C
LSRD #n
(Note 4)
Logical shift to the right by n bits (n =
0 to 31)
32
D1
8
+
2
E
imm
0→ b31 … b0 →C
7906 Group User’s Manual Rev.2.0
20-72
RENESAS [ RENESAS TECHNOLOGY CORP ]
