A-D CONVERTER
12.10 Repeat sweep mode 0
Continued from preceding Figure 12.10.1
Port P7 direction register
b7
b0
Port P7 direction register
(Address 1116
)
AN0
AN1
AN2
AN3
AN4
Clear the bits, corresponding to the
selected analog input p”ins, to “0.
Setting of A-D conversion start bit to “1.”
b7
b0
A-D control register 0
(Address 1E16
1
)
A-D conversion start bit
Trigger generated
Operation starts.
Note: Writing to the following must be performed while the A-D converter
halts (in other words, before a trigger is generated); this must be done
independent of the operation mode of the A-D converter.
• Each bit of the A-D control register 0, except bit 6
• Each bit of the A-D control register 1
• A-D register i (when the comparator function is selected)
• Comparator function select register 0
Especially, when the VREF connection select bit is cleared from “1” to “0,”
an interval of 1 µs or more must be elapsed before occurrence of a trigger.
Fig. 12.10.2 Initial setting example for related registers in repeat sweep mode 0 (2)
7906 Group User’s Manual Rev.2.0
12-29
RENESAS [ RENESAS TECHNOLOGY CORP ]
