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7906 参数 Datasheet PDF下载

7906图片预览
型号: 7906
PDF下载: 下载PDF文件 查看货源
内容描述: 16位单片机 [16-BIT SINGLE-CHIP MICROCOMPUTER]
分类和应用: 计算机
文件页数/大小: 531 页 / 3056 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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INTERRUPTS  
[Precautions for interrupts]  
[Precautions for interrupts]  
1. In order to change the interrupt priority level select bits (bits 0 to 2 at addresses 6E16 to 7C16, F516 to F916  
,
FD16 to FF16), 2 to 7 cycles of fsys are required after execution of a write instruction until change of the  
interrupt priority level. Therefore, when the interrupt priority level of a certain interrupt source is repeatedly  
changed in a very short time, which consists of a few instructions, it is necessary to reserve the time  
required for the change by software. Figure 6.10.7 shows a program example to reserve the time required  
for the change. Note that the time required for the change depends on the contents of the interrupt priority  
detection time select bits (bits 4 and 5 at address 5E16). Table 6.10.2 lists the correspondence between  
the number of instructions inserted in Figure 6.10.7 and the interrupt priority detection time select bits.  
:
; Write instruction for the interrupt priority level select bits  
MOVMB 00XXH, #0XH  
; Inserted NOP instruction (Note)  
NOP  
;
NOP  
;
NOP  
; Write instruction for the interrupt priority level select bits  
MOVMB 00XXH, #0XH  
:
Note: Except a write instruction for address XX16, any instruction which has the same  
cycles as the NOP instruction can also be inserted, instead of the NOP instruction.  
For the number of inserted NOP instructions, see Table 6.10.2.  
XX: any of 6E to 7F, F1, F2, F5 to F9, and FD to FF  
Fig. 6.10.7 Program example to reserve time required for change of interrupt priority level  
Table 6.10.2 Correspondence between number of instructions to be inserted in Figure 6.10.7 and  
interrupt priority detection time select bits  
Interrupt priority level  
detection time  
Number of inserted  
NOP instructions  
7 or more  
Interrupt priority detection time select bits (Note)  
b5  
0
b4  
0
7 cycles of fsys  
0
1
4 cycles of fsys  
2 cycles of fsys  
Do not select.  
4 or more  
1
0
2 or more  
1
1
Note: We recommend [b5 = 1, b4 = 0].  
2. When allocating pin INT  
0 (output disabled).  
3
to pin P7  
4
, be sure that the D-A  
1
output enable bit (bit 2 at address 9616) =  
3. When using pin P6OUTCUT/INT  
4
as an input pin of an external interrupt (pin INT ), be sure to use port pins  
4
P6  
0
to P6  
5
in the input mode. (Refer to section 5.2.3 Pin P6OUTCUT/INT .)  
4
7906 Group Users Manual Rev.2.0  
6-23