4. Register structure
The view of the register structure is described below:
ꢀ2
ꢀ1
b7 b6 b5 b4 b3 b2 b1 b0
X 0
XXX register (address XX16)
ꢀ5
Bit
Bit name
• • • select bit
Function
At reset R/W
ꢀ3
0
0 : …
1 : …
Undefined WO
The value is “0” at reading.
b2 b1
• • • select bit
• • • flag
0
0
0
RW
RW
RO
1
2
3
0 0 : …
0 1 : …
1 0 : …
1 1 : …
0 : …
1 : …
4
5
6
7
Fix this bit to “0.”
0
RW
RW
—
This bit is invalid in … mode.
Nothing is assigned.
0
Undefined
0
The value is “0” at reading.
—
ꢀ6
ꢀ4
ꢀ1
Blank
: Set to “0” or “1” according to the usage.
0
: Set to “0” at writing.
1
: Set to “1” at writing.
ꢀ
: Invalid depending on the mode or state. It may be “0” or “1.”
: Nothing is assigned.
ꢀ2
ꢀ3
0
1
: “0” immediately after reset.
: “1” immediately after reset.
: Undefined immediately after reset.
Undefined
RW
RO
: It is possible to read the bit state at reading. The written value becomes valid.
: It is possible to read the bit state at reading. The written value becomes invalid. Accordingly, the written
value may be “0” or “1.”
WO
: The written value becomes valid. It is impossible to read the bit state. The value is undefined at reading.
However, when [“0” at reading”] is indicated in the “Function” or “Note” column, the bit is always “0” at
reading. (See ] 5 above.)
—
: It is impossible to read the bit state. The value is undefined at reading.
However, when [“0” at reading”] is indicated in the “Function” or “Note” column, the bit is always “0” at
reading. (See ] 6 above.)
The written value becomes invalid. Accordingly, the written value may be “0” or “1.”
Invalid for that function or mode.
ꢀ4
2
RENESAS [ RENESAS TECHNOLOGY CORP ]
