SERIAL I/O
[Precautions for clock asynchronous serial I/O (UART) mode]
[Precautions for clock asynchronous serial I/O (UART) mode]
1. When using pin CTS
disabled).
2
/RTS
2
, be sure that the D-A output enable bit (bit 1 at address 9616) = “0” (output
1
2. When separating CTS
i
/RTS
i
, the CLK
i
pin cannot be used. Accordingly, when separating CTS
i
/RTS in
i
UART mode, be sure to select an internal clock.
3. Writing to the UARTi baud rate register (BRGi) must be performed while transmission/reception halts.
4. When transmitting, be sure to clear the TxD
0
/P1
3
, TxD
1
/P1
7
, or TxD
2
/P8 switch bit (bit 2, 3, or 5 at
3
address AC16) to “0.”
7905 Group User’s Manual Rev.1.0
11-55
RENESAS [ RENESAS TECHNOLOGY CORP ]
