Under development
This document is under development and its contents are subject to change.
M16C/6N Group (M16C/6NK, M16C/6NM)
1. Overview
Table 1.5 List of Pin Names for 100-Pin Package (2)
Control
Pin
Interrupt
Pin
Analog CAN Module Bus Control
Pin No.
Port
Timer Pin
UART Pin
(1)
Pin
Pin
Pin
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
NOTE:
P4_1
P4_0
P3_7
P3_6
P3_5
P3_4
P3_3
P3_2
P3_1
A17
A16
A15
A14
A13
A12
A11
A10
A9
VCC2
VSS
P3_0
A8(/-/D7)
P2_7
P2_6
P2_5
P2_4
P2_3
P2_2
P2_1
P2_0
P1_7
P1_6
P1_5
P1_4
P1_3
P1_2
P1_1
P1_0
P0_7
P0_6
P0_5
P0_4
P0_3
P0_2
P0_1
P0_0
AN2_7
AN2_6
AN2_5
AN2_4
AN2_3
AN2_2
AN2_1
AN2_0
A7(/D7/D6)
A6(/D6/D5)
A5(/D5/D4)
A4(/D4/D3)
A3(/D3/D2)
A2(/D2/D1)
A1(/D1/D0)
A0(/D0/-)
D15
_________
INT5
_________
INT4
D14
_________
INT3
D13
D12
D11
D10
D9
D8
AN0_7
AN0_6
AN0_5
AN0_4
AN0_3
AN0_2
AN0_1
AN0_0
AN7
D7
D6
D5
D4
D3
D2
D1
D0
______
P10_7 KI3
______
P10_6 KI2
AN6
______
P10_5 KI1
AN5
______
P10_4 KI0
P10_3
AN4
AN3
P10_2
AN2
P10_1
AN1
AVSS
P10_0
AN0
VREF
AVCC
______________
P9_7
P9_6
P9_5
SIN4
ADTRG
SOUT4
CLK4
ANEX1 CTX0
ANEX0 CRX0
1. Not available the bus control pins in T/V-ver..
Rev.2.10 Aug 25, 2006 page 8 of 81
REJ03B0058-02100
RENESAS [ RENESAS TECHNOLOGY CORP ]
