Under development
This document is under development and its contents are subject to change.
M16C/6N Group (M16C/6N4)
1. Overview
1.2 Performance Overview
Table 1.1 lists the Functions and Specifications for M16C/6N Group (M16C/6N4).
Table 1.1 Functions and Specifications for M16C/6N Group (M16C/6N4)
Specification
Item
Normal-ver.
T/V-ver.
CPU
Number of fundamental
instructions
91 instructions
Minimum instruction
execution time
Operating mode
Address space
41.7 ns (f(BCLK) = 24 MHz,
50.0 ns (f(BCLK) = 20 MHz,
1/1 prescaler, without software wait) 1/1 prescaler, without software wait)
Single-chip, memory expansion, and microprocessor modes
1 Mbyte
Memory capacity
Peripheral Ports
Refer to Table 1.2 Product Information
Input/Output: 87 pins, Input: 1 pin
Timer A: 16 bits ✕ 5 channels
Function
Multifunction timers
Timer B: 16 bits ✕ 6 channels
Three-phase motor control circuit
3 channels
Serial interfaces
(2)
Clock synchronous, UART, I2C-bus (1), IEBus
1 channel
Clock synchronous
A/D converter
D/A converter
DMAC
10-bit A/D converter: 1 circuit, 26 channels
8 bits ✕ 2 channels
2 channels
CRC calculation circuit
CAN module
Watchdog timer
Interrupts
CRC-CCITT
2 channels with 2.0B specification
15 bits ✕ 1 channel (with prescaler)
Internal: 31 sources, External: 9 sources
Software: 4 sources, Priority levels: 7 levels
Clock generation circuits 4 circuits
• Main clock oscillation circuit (*)
• Sub clock oscillation circuit (*)
• On-chip oscillator
• PLL frequency synthesizer
(*) Equipped with on-chip feedback resistor
Oscillation-stopped detector Main clock oscillation stop and re-oscillation detection function
Electrical
Characteristics
Supply voltage
VCC = 3.0 to 5.5 V (f(BCLK) = 24 MHz, VCC = 4.2 to 5.5 V (f(BCLK) = 20 MHz,
1/1 prescaler, without software wait) 1/1 prescaler, without software wait)
Consumption Mask ROM 20 mA (f(BCLK) = 24 MHz,
18 mA (f(BCLK) = 20 MHz,
PLL operation, no division)
20 mA (f(BCLK) = 20 MHz,
PLL operation, no division)
current
PLL operation, no division)
Flash memory 22 mA (f(BCLK) = 24 MHz,
PLL operation, no division)
Mask ROM 3 µA (f(BCLK) = 32 kHz, Wait mode, Oscillation capacity Low)
Flash memory 0.8 µA (Stop mode, Topr = 25°C)
Flash Memory Programming and erasure voltage 3.0 0.3 V or 5.0 0.5 V
5.0 0.5 V
Version
I/O
Programming and erasure endurance 100 times
I/O withstand voltage
5.0 V
Characteristics Output current
5 mA
Operating Ambient Temperature
-40 to 85°C
T version: -40 to 85°C
V version: -40 to 125°C (option)
Device Configuration
Package
CMOS high-performance silicon gate
100-pin molded-plastic QFP, LQFP
NOTES:
1. I2C-bus is a trademark of Koninklijke Philips Electronics N.V.
2. IEBus is a trademark of NEC Electronics Corporation.
option: All options are on request basis.
Rev.2.40 Aug 25, 2006 page 2 of 88
REJ03B0003-0240
RENESAS [ RENESAS TECHNOLOGY CORP ]
