RTL8306SD/RTL8306SDM
Datasheet
9.2.7.
PHY 0 Register 16 (Page 0, 1, 2, 3): Global Control 0
Table 34. PHY 0 Register 16 (Page 0, 1, 2, 3): Global Control 0
Reg.bit
Name
Mode Description
Default
16.15
Page selection
(Selpage)
RW [~16.1 16.15]
00=Select the registers in page 0
0
01=Select the registers in page 1
10=Select the registers in page 2
11=Select the registers in page 3
16.[14:8]
16.7
Reserved
-
-
0000111
EEPROM
existence
RO
1: EEPROM does not exist. (pin EnEEPROM=0 or pin
EnEEPROM=1 but EEPROM does not exist)
0: EEPROM exists (pin EnEEPROM=1 and EEPROM exists)
From Pin 73
ENEEPRO
M strapping
option,
default 1
16.6
16.5
Reserved
-
-
1
1
IEEE 802.3x
transmit flow
control enable
RW 1: Enable transmit flow control based on auto-negotiation results
0: Will not enable transmit flow control no matter what the auto-
negotiation result is
Note: This bit is global and has higher priority than NWAY result.
16.4
IEEE 802.3x
receive flow
control enable
RW 1: When the RTL8306SD/RTL8306SDM receives a pause control
frame, it has the ability to stop the next transmission of a normal
frame until the timer is expired based on the auto negotiation
result
1
0: Will not flow control received frames no matter what the auto-
negotiation result is
Note: This bit is global and has higher priority than NWAY result.
16.3
16.2
16.1
Enable port 4
LED
RW 1: Drive LED pin of port 4
1
0
1
0: Do not drive LED pins of port 4 for special application. In UTP
application, this bit should be set to 1 to drive LEDs of port 4
Enable loop
detection
function
RW 1: Enable loop detection function
0: Disable loop detection function
Page selection
(Selpage)
RW [~16.1 16.15]
00=Select the registers in page 0
01=Select the registers in page 1
10=Select the registers in page 2
11=Select the registers in page 3
16.0
Reserved
-
-
0
6-Port 10/100Mbps Single-Chip Dual MII/RMII Switch Controller
91
Track ID: JATR-1076-21 Rev. 1.1