RTL8208B-LF/RTL8208BF-LF
Datasheet
Loopback – The RTL8208B(F)-LF may be placed into loopback mode by writing a ‘1’ to bit 14.
Loopback mode may be cleared either by writing a ‘0’ to bit 14 or by resetting the chip. When this bit is
read, it will return a ‘1’ when the chip is in software-controlled loopback mode, otherwise it will return a
‘0’.
Speed Selection – If auto negotiation is enabled, this bit has no effect on the speed selection. However, if
auto negotiation is disabled using software control, the operating speed of the RTL8208B(F)-LF can be
forced by writing the appropriate value to bit 13. Writing a ‘1’ to this bit forces 100Base-X operation,
while writing a ‘0’ forces 10Base-T operation. When this bit is read, it returns the value of the
software-controlled forced-speed selection only.
Auto Negotiation Enable – Default is auto negotiation enabled for all TP ports, and disabled for FX
ports. Auto negotiation can be disabled via software control by setting 0.12=0.
Power Down – The RTL8208B(F)-LF supports a low power mode. Writing a ‘1’ will enable power down
mode, and writing a ‘0’ will return the RTL8208B(F)-LF to normal operation. When read, this register
will return a ‘1’ when in power down mode, and a ‘0’ during normal operation.
Isolate – Each PHY may be isolated from its MII by writing a ‘1’ to bit 10. All MII outputs will be tri-
stated and all MII inputs will be ignored. Since the MII management interface is still active, the isolate
mode may be cleared either by writing a ‘0’ to bit 10 or by resetting the chip. When this bit is read, it will
return a ‘1’ when the chip is in isolate mode, and return a ‘0’ during normal operation.
Restart Auto Negotiation – Bit 9 is a self-clearing bit that allows the auto negotiation process to be
restarted, regardless of the status of the auto negotiation state machine. In order for this bit to have an
effect, auto negotiation must be enabled. Writing a ‘1’ to this bit restarts auto negotiation. Writing a ‘0’ to
this bit has no effect. When this bit is read, it will always return a ‘0’.
Duplex Mode – By default, the RTL8208B(F)-LF powers up in half duplex mode. The chip can be
forced into full duplex mode by writing a ‘1’ to bit 8 while auto negotiation is disabled. Half duplex mode
can be resumed either by writing a ‘0’ to bit 8 or by resetting the chip. When NWay is enabled, this bit
reflects the results of auto negotiation, and is in read-only mode. When NWay is disabled, this bit can be
set through the SMI, and is in Read/Write mode. When 100FX is enabled, this bit can be set through the
SMI or FX_DUPLEX pin and is in Read/Write mode.
Reserved Bits – All reserved MII register bits must be written as ‘0’ at all times. Ignore the
RTL8208B(F)-LF output when these bits are read.
Single-Chip Octal 10/100-TX/FX PHY Transceiver
15
Track ID: JATR-1076-21 Rev. 1.3
REALTEK [ Realtek Semiconductor Corp. ]
