RTL8169S-32/RTL8169S-64
Datasheet
7.7.2.
PCI Clock Specification
T_high
T_low
0.6Vcc
0.5Vcc
0.4Vcc, peak-to-peak
(minimum)
0.4Vcc
0.3Vcc
0.2Vcc
T_cyc
Figure 10. 3.3V Clock Waveform
V_ih
V_test
CLK (@ Device #1)
CLK (@ Device #2)
T_skew
V_il
T_skew
V_ih
T_skew
V_test
V_il
Figure 11. Clock Skew Diagram
Table 19. Clock and Reset Specifications
66MHz 33MHz
Symbol
Parameter
Min
15
6
6
1.5
50
Max
30
Min
30
11
11
1
Symbol
Parameter
Tcyc
Thigh
Tlow
--
--
Tskew
CLK Cycle Time
CLK High Time
CLK Low Time
CLK Slew Rate
RST# Slew Rate
CLK Skew
∞
ns
ns
ns
V/ns
mV/ns
ns
4
-
1
4
-
2
50
Integrated Gigabit Ethernet Controller (NIC)
28
Track ID: JATR-1076-21 Rev. 1.7
REALTEK [ Realtek Semiconductor Corp. ]
