RTL8169S-32/RTL8169S-64
Datasheet
6.6. Flash/EEPROM Interface
The Flash interface consists of address bus MA(16:0) and data bus MD(7:0) which share the pin with PCI
interface AD(16:0) and AD(32:24), respectively. It also consists of several control signals: WEB,
OEB(LED0), CSB(EECS). The RTL8169S supports the attachment of an external EEPROM. The 93C46
is a 1K-bit EEPROM (the 93C56 is a 2K-bit EEPROM).
The EEPROM interface provides the ability for the RTL8169S to read from and write data to an external
serial EEPROM device. Values in the external EEPROM allow default fields in PCI configuration space
and I/O space to be overridden following a reboot or software EEPROM auto load command. The
RTL8169S will auto load values from the EEPROM. If the EEPROM is not present, the RTL8169S
initialization uses default values for the appropriate Configuration and Operational Registers. Software can
read and write to the EEPROM using “bit-bang” accesses via the 9346CR Register. The interface consists
of EESK, EECS, EEDO, and EEDI.
Table 10. Flash/EEPROM Interface
Flash
Description
MA[16:0]
(PCIAD16:0)
Boot PROM Address Bus. These pins are used to access up to a 128k-byte flash
memory or EEPROM.
MD7-0(PCIAD31:24)
CSB(EECS/BROMCSB)
Boot PROM data bus when in Boot PROM mode.
The chip select signal of the Boot PROM.
OEB(LED0/BROMOEB) Enables the output buffer of the Boot PROM or Flash memory during a read operation.
EEPROM
EECS
EESK
Description
93C46 (93C56) chip select
EEPROM serial data clock
EEDI/Aux
Input data bus/Input pin to detect if Aux. Power exists or not on initial power-on.
This pin should be connected to Boot PROM. To support wakeup from ACPI D3cold
or APM power-down, this pin must be pulled high to aux. power via a resistor. If this
pin is not pulled high to Aux. Power, the RTL8169S assumes that no Aux. Power
exists.
EEDO
Output data bus
Integrated Gigabit Ethernet Controller (NIC)
19
Track ID: JATR-1076-21 Rev. 1.7
REALTEK [ Realtek Semiconductor Corp. ]
