RTL8169S-32/RTL8169S-64
Datasheet
6.4. MII/GMII Interface
6.4.1.
MII
The RTL8169S supports 10Mbps and 100Mbps link operation. During the operation, the PHY
communicates with the MAC through the MII as defined in the IEEE 802.3 (clause 22) specifications. The
MII consists of a transmit data interface (TxEN, TxER, TXD[3:0], and TxCLK), a receive data interface
(RxDV, RxER, RXD[3:0], and RxCLK), two status signals (CRS and COL) and a management interface
(MDC and MDIO). In this mode of operation, both Transmit and Receive clocks are supplied by the PHY.
6.4.2.
GMII
In 1000Base-T mode, the GMII interface is selected, the 125MHz transmit clock is expected on GTXCLK,
TXCLK sources 25MHz, 2.5MHz, or 0MHz clock depending on the operation mode, and RXCLK sources
the 125MHz receive clock.
6.5. LEDs
The RTL8169S supports four LED signals in four different configurable operation modes. The modes are
shown in Pin Descriptions, page 5.
6.5.1.
Link Monitor
The Link Monitor senses a link, such as LINK10, LINK100, LINK1000, LINK10/100/1000. Whenever a
link is established, the specific link LED pin is driven low. Once disconnected, the link LED pin is driven
high indicating that no network connection exists.
Integrated Gigabit Ethernet Controller (NIC)
14
Track ID: JATR-1076-21 Rev. 1.7