RTL8169S-32/RTL8169S-64
Datasheet
The PME# signal is asserted only when the following conditions are met:
1. The PMEn bit (bit0, CONFIG1) is set to 1.
2. The PME_En bit (bit8, PMCSR) in PCI Configuration Space is set to 1.
3. The RTL8169S may assert PME# in the current power state or in isolation state, depending on the
PME_Support (bit15-11) setting of the PMC register in PCI Configuration Space.
4. A Magic Packet, LinkUp, or Wakeup Frame has been received.
5. Writing a 1 to the PME_Status (bit15) of the PMCSR register in the PCI Configuration Space clears
this bit and causes the RTL8169S to stop asserting a PME# (if enabled).
When the device is in power down mode, e.g. D1-D3, the IO, MEM, and Boot ROM spaces are all
disabled. After a RST# assertion, the device’s power state is restored to D0 automatically if the original
power state was D3cold. There is no hardware delay at the device’s power state transition. When in ACPI
mode, the device does not support PME (Power Management Enable) from D0 (this is the Realtek default
setting of the PMC register auto loaded from EEPROM). The setting may be changed from the EEPROM,
if required). The RTL8169S also supports the legacy LAN WAKE-UP function. The LWAKE pin is used
to notify legacy motherboards to execute the wake-up process whenever the device receives a wakeup
event, such as Magic Packet.
The LWAKE signal is asserted according to the following settings:
1. LWPME bit (bit4, CONFIG4):
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LWAKE can only be asserted when PMEB is asserted and ISOLATEB is low.
LWAKE is asserted whenever a wakeup event occurs.
2. Bit1 of DELAY byte (offset 1Fh, EEPROM):
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LWAKE signal is enabled.
LWAKE signal is disabled.
Integrated Gigabit Ethernet Controller (NIC)
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Track ID: JATR-1076-21 Rev. 1.7