RDC
®
RISC DSP Communication
R2880
FAST ETHERNET RISC PROCESSOR
2.
Block Diagram
DRQ0/INT5
DRQ1/INT6
CLKOUTA
SD_CLK
PCICLK
INTB_n
INTA_n
INT3
INT2
INT1
VCC
GND
X1
X2
Clock & Power
Management Uuit
Interrupt
Controller
Unit
INT0
Timer
Controller
Unit
DMA
Controller
Unit
RST_n
Reset Unit
PCIRST_n
MAC 0
MII 0
UCS_n
MCS_n
PCS0_n
PCS1_n
PCS2_n
PCS3_n
PCS5_n
PCS6_n
Chip
Select
Unit
RDC
RISC CPU
8K-B yte
L1
Cache
P CI Master
PCI Bus Interface
MAC 1
MII 1
PIO Unit
Ref resh
Control Unit
RAS_n
CAS_n
WE_n
DQMH
DQML
BA[1:0]
P CI Target
P CI Configuration
Register
P CI Arbiter
16550 UART
Serial Port 0
UART0
SDRAM/B us Interface
Unit
16550 UART
Serial Port 1
UART1
A[22:0]
D[15:0]
IOR_n
RD_n
IOW_n
ARDY
Specifications subject to change without notice, contact your sales representatives for the most update information.
Page
3 of
5
REV
1.0
Jun. 12
2007
PCI Bus
WR_n
RDC [ RDC SEMICONDUCTOR ]
