®
RISC DSP Communication
RDC
R1100
16 Bit RISC Micro Processor
2. Block Diagram
INT2/INTA0
INT1/SELECT
INT0 NMI
CLKOUTA
INT3/INTA1/IRQ
INT4
TMROUT0
TMROUT1
DRQ0
DRQ1
CLKOUTB
TMRIN0 TMRIN1
X1
X2
PLL
Interrupt
Control Unit
Timer Control
Unit
DMA
Unit
VCC
GND
Clock & Power
Management
RST
LCS/ONCE0
MCS3/RFSH
Chip
Select
Unit
Instruction
Queue (64bits)
MCS2-MCS0
UCS/ONCE1
PCS3-PCS0
Instruction
Decoder
Micro
ROM
PSRAM
Control
Unit
PIO
Unit
PCS5/A1
PCS6/A2
Control Signal
Register
File
EA / LA
Address
General,
Segment,
Eflag Register
Refresh
Control
Unit
Asynchro-
nous Serial
Port
ARDY
SRDY
S2~S0
DT/R
DEN
TXD
RXD
Bus
Interface
Unit
ALU
(Special,
Logic,
Adder,
BSF)
HOLD
HLDA
Execution
Unit
Synchronous
Serial Interface
S6/CLKDIV2
UZI
SCLK
SDATA
SDEN0 SDEN1
RD
WHB
WLB
A19~A0
AD15~AD0
ALE
WR
BHE/ADEN
Specifications subject to change without notice, contact your sales representatives for the most update information.
RDC Confidential Page 3 of 5
REV 1.0 May. 04 2007
RDC [ RDC SEMICONDUCTOR ]
