16MB ESDRAM SO-DIMM
2Mx64
Preliminary
Features
•
•
•
•
JEDEC standard 144-pin SO-DIMM
Single 3.3V
±
0.3V Power Supply
Fully Synchronous Operation
Sustained Random Burst Reads (Same Bank)
•
1-1-1-1 at 75MHz (CL=1)
•
2-1-1-1 at 150MHz (CL=2)
Programmable Burst Length (1, 2, 4, 8, Full Page)
Programmable CAS Latency (1, 2, 3)
Early Auto-Precharge While Reading from Cache
Hidden Auto-Refresh without closing Read Pages
64ms, 2048-Cycle Refresh
LVTTL Compatible Inputs and I/Os
PIN ASSIGNMENT
Vss
DQ0
DQ1
DQ2
DQ3
Vdd
DQ4
DQ5
DQ6
DQ7
Vss
DQMB0
DQMB1
Vdd
A0
A1
A2
Vss
DQ8
DQ9
DQ10
DQ11
Vdd
DQ12
DQ13
DQ14
DQ15
Vss
NC
NC
CK0
Vdd
/RAS
/WE
/S0
NC (/S1)
RSVD
Vss
RSVD
RSVD
Vdd
DQ16
DQ17
DQ18
DQ19
Vss
DQ20
DQ21
DQ22
DQ23
Vdd
A6
A8
Vss
A9
A10/AP
Vdd
DQMB2
DQMB3
Vss
DQ24
DQ25
DQ26
DQ27
Vdd
DQ28
DQ29
DQ30
DQ31
Vss
SDA
Vdd
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
Vss
DQ32
DQ32
DQ34
DQ35
Vdd
DQ36
DQ37
DQ38
DQ39
Vss
DQMB4
DQMB5
Vdd
A3
A4
A5
Vss
DQ40
DQ41
DQ42
DQ43
Vdd
DQ44
DQ45
DQ46
DQ47
Vss
RSVD
RSVD
CKE0
Vdd
/CAS
NC (CKE1)
NC
NC
CK1
Vss
RSVD
RSVD
Vdd
DQ48
DQ49
DQ50
DQ51
Vss
DQ52
DQ53
DQ54
DQ55
Vdd
A7
BA0
Vss
NC (BA1)
NC
Vdd
DQMB6
DQMB7
Vss
DQ56
DQ57
DQ58
DQ59
Vdd
DQ60
DQ61
DQ62
DQ63
Vss
SCL
Vdd
•
•
•
•
•
•
Speed Grade
Speed
Grade
-6
-7.5
-10
Clock Frequency
CL=1
75MHz
66MHz
50MHz
CL=2
150MHz
133MHz
100MHz
CL=3
150MHz
133MHz
100MHz
Access Time
CL=1
10.5ns
12ns
15ns
CL=2
4.3ns
4.5ns
5.0ns
CL=3
4.3ns
4.5ns
5.0ns
Description
The Enhanced Memory Systems 16MB enhanced SDRAM
(ESDRAM) SO-DIMM is a high performance, low latency
memory module organized as 2Mx64. The ESDRAM devices
on-board combine raw speed with innovative architecture to
optimize system price-performance in high performance
computer and embedded control systems.
This SO-DIMM is 100% pin, function,and timing
compatible with the JEDEC standard 144-pin SDRAM SO-
DIMMs. Each ESDRAM device has two logical banks of
memory which are accessed through the use of BA0 (pin
106). All control, address, and data input signals are
registered into each of the Enhanced SDRAM components
with the use of an external clock, CK0 (pin 61) and CK1 (pin
74). The rising edge of the clocks is used as the timing
reference for all inputs and outputs.
The ESDRAM SO-DIMM provides pipelined burst SRAM
performance up to 66MHz and nearly the same at bus speeds
up to 150MHz. The -10ns DIMMs are specified to operate at
100MHz in CL=2 mode. The -6ns DIMMs will operate at
150MHz in CL=2 mode and 66MHz in CL=1 mode.
All standard SDRAM functionality and commands are
supported with a few enhancements available to boost
memory system performance. The advanced features include
1) the ability to quickly close a read page by performing a
Read/AP and 2) the ability to have four open pages through
the use of the No Write Transfer mode.
The information contained herein is subject to change without notice.
Enhanced reserves the right to change or discontinue this product
without notice.
©
1999 Enhanced Memory Systems Inc.
1850 Ramtron Drive, Colorado Springs, CO 80921
Telephone
(800) 545-DRAM,
Fax
(719) 488-9095,
Web
http://www.edram.com
Rev. 1.1
RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
