PC-133 HSDRAM
256MB, 512MB DIMM
Preliminary Data Sheet
512MB
Serial Presence Detect (SPD) for PC-133 DIMMs
256MB
512MB
256MB
Byte Description
** Hex Code **
0
1
2
3
4
5
6
Number of bytes written into EEPROM
Total number of SPD bytes
Memory Type
Number of Row Addresses
Number of Column Addresses
Number of Module Banks
Module Data Width
128
256
SDRAM
13
10
1
x64
x72
0
128
256
SDRAM
13
10
2
x64
x72
80
08
04
0D
0A
01
40
48
00
01
75
46
00
02
82
08
00
08
01
8F
04
06
01
01
00
0E
80
08
04
0D
0A
02
40
48
00
01
75
46
00
02
82
08
00
08
01
8F
04
06
01
01
00
0E
7
8
Module Data Width (cont’d)
Voltage Interface Levels
0
LVTTL
7.5 ns
4.6 ns
LVTTL
7.5 ns
4.6 ns
9
10
11
Cycle Time at max CAS Latency
SDRAM Clock Access Time
DIMM config (non-parity, parity, ECC)
--- Non-parity ---
--- ECC ---
12
13
14
Refresh Rate and Type
Primary SDRAM Width
Error Checking Data Width
--- 7.8us / Self ---
x8
N/A
x8
x8
N/A
x8
x64
x72
15
16
17
18
19
20
21
22
Min. CAS-to-CAS Delay (tCCD)
Burst Lengths Supported
Number of Banks on SDRAM Device
CAS Latencies Supported
CS Latency
Write Latency
SDRAM Module Attributes
SDRAM Device Attributes
1 clk
1 clk
--- 1,2,4,8,Full Pg ---
4
2,3
0
4
2,3
0
0
0
+/-10% Vdd, Precharge All,
Wr-1/RdBrst
23
24
25
26
27
28
29
30
31
32
33
34
35
36-61
62
63
Min. Clock Cycle Time at CL=2
Clock Access Time at CL=2 (tAC2)
Min. Clock Cycle Time at CL=1
Clock Access Time at CL=1 (tAC1)
Min. Row Precharge Time (tRP)
Min. Row-to-Row Delay (tRRD)
Min. RAS-to-CAS Delay (tRCD)
Min. RAS Pulse Width (tRAS)
Density of each bank on module
Cmd/Addr input set-up time
Cmd/Addr input hold time
Data input set-up time
10 ns
6 ns
N/A
10 ns
6 ns
N/A
A0
60
00
00
0F
0F
0F
26
40
15
08
15
08
00
02
A3
B5
A0
60
00
00
0F
0F
0F
26
40
15
08
15
08
00
02
A4
B6
N/A
N/A
15 ns
15 ns
15 ns
37.5 ns
256MB
15 ns
15 ns
15 ns
37.5 ns
256MB
1.5 ns
0.8 ns
1.5 ns
0.8 ns
Data input hold time
Superset Information
SPD Rev.
-
-
-
-
2
Checksum for bytes 0-62
non-ECC
ECC
64-71
72
73-90
91,92
93,94
95-98
JEDEC ID code
Enhanced Memory Systems
7F32FFFFFFFFFFFF
Manufacturing Location
Manufacturer’s Part #
PCB Rev. Code
Manufacturing Date
Assembly Serial #
-
-
xxxx
xxxx
rrrr
xxxx
xxxx
rrrr
SM25608DT
-
SM51208DT
-
yyww code
serial number
open
yyww
ssss
00
yyww
ssss
00
99-125 Manufacturer’s Specific Data
126
127
Intel specification frequency
Intel specification CL and clock support
133MHz
64
AF
64
FF
-
-
Enhanced Memory Systems Inc., 1850 Ramtron Dr., Colo Spgs, CO 80921
PHONE: (800) 545-DRAM; FAX: (719) 488-9095; http://www.edram.com
1999 Enhanced Memory Systems. All rights reserved.
The information contained herein is subject to change without notice.
Page 10 of 11
Revision 1.0
RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
