FM4005
SCL
SDA
2-Wire
Interface
LockOut
RST
Watchdog
LV Detect
Special
Function
Registers
S/N
RTC Cal.
RTC Registers
X1
PFI
+
CAL/PFO
RTC
1.2V
X2
-
-
+
512Hz
Event
Counters
CNT1
CNT2
2.5V
VDD
Switched Power
VBAK
Nonvolatile
Battery Backed
Figure 1. Block Diagram
Pin Descriptions
Pin Name
CNT1, CNT2
Type
Input
Pin Description
Event Counter Inputs: These battery-backed inputs increment counters when an edge is
detected on the corresponding CNT pin. The polarity is programmable. These pins
should not be left floating. Tie to ground if pins are not used.
In calibration mode, this pin supplies a 512 Hz square-wave output for clock
calibration. In normal operation, this is the early power-fail output.
32.768 kHz crystal connection. When using an external oscillator, apply the clock to
X1 and leave X2 floating.
Active low reset output with weak pull-up. Also input for manual reset.
Serial Data & Address: This is a bi-directional line for the two-wire interface. It is
open-drain and is intended to be wire-OR’d with other devices on the two-wire bus.
The input buffer incorporates a Schmitt trigger for noise immunity and the output
driver includes slope control for falling edges. A pull-up resistor is required.
Serial Clock: The serial clock line for the two-wire interface. Data is clocked out of the
part on the falling edge, and in on the rising edge. The SCL input also incorporates a
Schmitt trigger input for noise immunity.
Early Power-fail Input: Typically connected to an unregulated power supply to detect
an early power failure. This pin should not be left floating.
Do Not Use: This pin must be left floating.
Backup supply voltage: A 3V battery or a large value capacitor. If V
DD
<3.6V and no
backup supply is used, this pin should be tied to V
DD
. If V
DD
>3.6V and no backup
supply is used, this pin should be left floating and the VBC bit should be set.
Supply Voltage.
Ground
CAL/PFO
X1, X2
/RST
SDA
Output
I/O
I/O
I/O
SCL
Input
PFI
DNU
VBAK
Input
-
Supply
VDD
VSS
Supply
Supply
Rev. 2.3
Oct. 2006
Page 3 of 23