FM31T372/374/376/378-G
32.768 kHz Clock Output
Note: Systems using lithium batteries should clear the
VBC bit to ‘0’ to prevent battery charging. The VBAK
circuitry includes an internal 1 K series resistor as
a safety element.
The 32.768 kHz clock (with precision equal to that of
the built-in crystal oscillator) can be output via the
FOUT pin. This output is not temperature
compensated. This clock can be disabled by clearing
the FOEN bit to „0‟.
32.768kHz
512 Hz
1 Hz
/OSCEN
Oscillator
W
32.768 kHz
crystal
Clock
Divider
Update
Logic
Date
6 bits
Years
8 bits
Months
5 bits
CF
Hours
6 bits
Minutes
7 bits
Seconds
7 bits
Days
3 bits
R
User Interface Registers
Figure 8. Real-Time Clock Core Block Diagram
timekeeping error. The 512Hz calibration output
must be measured at +25°C. This output is not
temperature compensated. The user converts the
measured error in ppm and writes the appropriate
correction value to the calibration register. The
correction factors are listed in the following tables.
Positive ppm errors require a negative adjustment
that removes pulses. Negative ppm errors require a
positive correction that adds pulses. Positive ppm
adjustments have the CALS (sign) bit set to „1‟,
whereas negative ppm adjustments have CALS = 0.
Offset/Aging Compensation
The user can expect the RTC to be accurate from the
factory. The RTC is calibrated at the factory at room
temperature. The CAL bits setting in Register 01h
will likely be a non-zero value. This is the initial
calibration value assigned at the factory prior to
shipment. The device may need re-calibrating after
solder reflow or after some period of time due to
crystal aging.
If the user needs to re-calibrate the RTC, the
following describes the steps to change the
calibration setting. Before making changes to the
CAL bits, the user can read these bits to verify the
current setting is an expected value. To enter
calibration mode, the CAL bit in a register 00h must
be set to „1‟. When the RTC is in calibration mode,
the CAL/PFO output pin is dedicated to the
calibration function and the power fail output is
temporarily unavailable. Calibration operates by
applying a digital correction to the counter based on
the frequency error. In this mode, the CAL/PFO pin
is driven with a 512 Hz (nominal) square wave. Any
measured deviation from 512 Hz translates into a
The calibration setting is stored in F-RAM so is not
lost should the backup source fail. It is accessed with
bits CAL.5-0 in register 01h. This value only can be
written when the CAL bit is set to „1‟. To exit the
calibration mode, the user must clear the CAL bit to a
0. When the CAL bit is 0, the CAL/PFO pin will
revert to the power fail output function.
Note: Temperature compensation is disabled when
the CAL bit is set to ‘1’. The user should clear this bit
to allow temperature compensation to activate.
Rev. 1.1
Apr. 2011
Page 8 of 26
RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
