FM25C160C - 16Kb 5V SPI F-RAM
WP
CS
HOLD
SCK
Instruction Decode
Clock Generator
Control Logic
Write Protect
256 x 64
FRAM Array
Instruction Register
Address Register
Counter
SI
11
8
Data I/O Register
3
Nonvolatile Status
Register
SO
Figure 1. Block Diagram
Pin Description
Pin Name
/CS
I/O
Input
Pin Description
Chip Select: This active low input activates the device. When high, the device enters
low-power standby mode, ignores other inputs, and all outputs are tri-stated. When
low, the device internally activates the SCK signal. A falling edge on /CS must occur
prior to every op-code.
Serial Clock: All I/O activity is synchronized to the serial clock. Inputs are latched on
the rising edge and outputs occur on the falling edge. Since the device is static, the
clock frequency may be any value between 0 and 20 MHz and may be interrupted at
any time.
Hold: The /HOLD pin is used when the host CPU must interrupt a memory operation
for another task. When /HOLD is low, the current operation is suspended. The device
ignores any transition on SCK or /CS. All transitions on /HOLD must occur while
SCK is low.
Write Protect: This active low pin prevents write operations to the status register. This
is critical since other write protection features are controlled through the status
register. A complete explanation of write protection is provided on page 6. *Note that
the function of /WP is different from the FM25160.
Serial Input: All data is input to the device on this pin. The pin is sampled on the rising
edge of SCK and is ignored at other times. It should always be driven to a valid logic
level to meet I
DD
specifications.
* SI may be connected to SO for a single pin data interface.
Serial Output. SO is the data output pin. It is driven actively during a read and remains
tri-state at all other times including when /HOLD is low. Data transitions are driven on
the falling edge of the serial clock.
* SO may be connected to SI for a single pin data interface.
Supply Voltage. 5V
Ground
SCK
Input
/HOLD
Input
/WP
Input
SI
Input
SO
Output
VDD
VSS
Supply
Supply
Rev. 1.1
July 2011
Page 2 of 13
RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
