FM25C160C - 16Kb 5V SPI F-RAM
Serial Data Bus Timing
tD
CS
tCSH
tCL
tCH
tF
tR
tCSU
1/tCK
SCK
tSU
tH
SI
tOH
tODV
tOD
SO
/Hold Timing
tHS
CS
tHH
SCK
tHH
tHS
HOLD
SO
tHZ
tLZ
Power Cycle Timing
VDD min
VDD
CS
tVF
tVR
tPD
tPU
Power Cycle Timing (TA = -40 C to + 85 C, VDD = 4.5V to 5.5V unless otherwise specified)
Symbol
tPU
tPD
tVR
tVF
Parameter
VDD(min) to First Access Start
Last Access Complete to VDD(min)
VDD Rise Time
Min
1
0
30
100
Max
Units
ms
s
s/V
s/V
Notes
-
-
-
-
1
1
VDD Fall Time
Notes
1. Slope measured at any point on VDD waveform.
Rev. 1.1
July 2011
Page 11 of 13